NTD4302T4G Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET 68 A, 30 V, N−Channel DPAK

NTD4302
Power MOSFET
68 A, 30 V, N−Channel DPAK
Features
• Ultra Low R_DS(on)
• Higher Efficiency Extending Battery Life
• Logic Level Gate Drive
• Diode Exhibits High Speed, Soft Recovery
• Avalanche Energy Specified
• I_DSS Specified at Elevated Temperature
• DPAK Mounting Information Provided
• These Devices are Pb−Free and are RoHS Compliant
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery Powered Products:
i.e., Computers, Printers, Cellular and Cordless Telephones,
and PCMCIA Cards
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ T_C = 25°C
Continuous Drain Current @ T_C = 25°C (Note 4)
Continuous Drain Current @ T_C = 100°C
Thermal Resistance − Junction−to−Ambient
(Note 2)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ T_A = 25°C
Continuous Drain Current @ T_A = 100°C
Pulsed Drain Current (Note 3)
Symbol
V_DSS
V_GS
R_qJC
P_D
I_D
I_D
R_qJA
P_D
I_D
I_D
I_DM
Value
30
±20
1.65
75
68
43
67
1.87
11.3
7.1
36
Unit
Vdc
Vdc
°C/W
W
A
A
°C/W
W
A
A
A
Thermal Resistance − Junction−to−Ambient
(Note 1)
Total Power Dissipation @ T_A = 25°C
Continuous Drain Current @ T_A = 25°C
Continuous Drain Current @ T_A = 100°C
Pulsed Drain Current (Note 3)
R_qJA
P_D
I_D
I_D
I_DM
120 °C/W
1.04 W
8.4
A
5.3
A
28
A
Operating and Storage Temperature Range
T_J, T_stg −55 to °C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 30 Vdc, V_GS = 10 Vdc,
Peak I_L = 17 Apk, L = 5.0 mH, R_G = 25 W)
E_AS
722 mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8 in from case for 10 seconds
T_L
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
4. Current Limited by Internal Lead Wires.
http://onsemi.com
V_(BR)DSS
30 V
R_DS(on) TYP
7.8 mW @ 10 V
I_D MAX
68 A
N−Channel
D
G
S
MARKING DIAGRAMS
& PIN ASSIGNMENTS
12
3
4
Drain
4
DPAK
CASE 369C
(Surface Mount)
STYLE 2
1
Gate
2
Drain
3
Source
4
1
2
3
DPAK
CASE 369D
(Straight Lead)
STYLE 2
4
Drain
12 3
Gate Drain Source
Y
WW
T4302
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
1
October, 2010 − Rev. 8
Publication Order Number:
NTD4302/D