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NTD20N06L_14 Datasheet, PDF (1/8 Pages) ON Semiconductor – Power MOSFET
NTD20N06L, NTDV20N06L
Power MOSFET
20 A, 60 V, Logic Level, N−Channel
DPAK/IPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
Features
• AEC Q101 Qualified − NTDV20N06L
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 10 MW)
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tpv10 ms)
Drain Current
− Continuous @ TA = 25°C
− Continuous @ TA = 100°C
− Single Pulse (tpv10 ms)
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
VDSS
VDGR
VGS
VGS
ID
ID
IDM
PD
60
Vdc
60
Vdc
Vdc
±15
±20
20
Adc
10
60
Apk
60
W
0.40 W/°C
1.88
W
1.36
W
Operating and Storage Temperature Range
TJ, Tstg − 55 to °C
+175
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc,
L = 1.0 mH, IL(pk) = 16 A, VDS = 60 Vdc)
EAS
128
mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
RqJC
RqJA
RqJA
°C/W
2.5
80
110
Maximum Lead Temperature for Soldering
Purposes, 1/8 in from case for 10 seconds
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 1 in pad size, (Cu Area 1.127 in2).
2. When surface mounted to an FR4 board using recommended pad size,
(Cu Area 0.412 in2).
© Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 4
http://onsemi.com
V(BR)DSS
60 V
RDS(on) TYP
39 mW@5.0 V
ID MAX
20 A
(Note 1)
D
N−Channel
G
S
4
4
12
3
DPAK
CASE 369C
STYLE 2
1
2
3
IPAK
CASE 369D
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
1
Gate
2
Drain
3
Source
12 3
Gate Drain Source
A
Y
WW
20N6L
G
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Publication Order Number:
NTD20N06L/D