NTD20N06-001 Datasheet, PDF (1/7 Pages) ON Semiconductor – Power MOSFET 20 Amps, 60 Volts, N−Channel DPAK

NTD20N06, NTDV20N06
Power MOSFET
20 Amps, 60 Volts, N−Channel DPAK
Designed for low voltage, high speed switching applications in power
supplies, converters and power motor controls and bridge circuits.
Features
• Lower R_DS(on)
• Lower V_DS(on)
• Lower Capacitances
• Lower Total Gate Charge
• Lower and Tighter V_SD
• Lower Diode Reverse Recovery Time
• Lower Reverse Recovery Stored Charge
• AEC Q101 Qualified − NTDV20N06
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (R_GS = 10 MW)
Gate−to−Source Voltage
− Continuous
− Non−repetitive (t_pv10 ms)
Drain Current
− Continuous @ T_A = 25°C
− Continuous @ T_A = 100°C
− Single Pulse (t_pv10 ms)
Total Power Dissipation @ T_A = 25°C
Derate above 25°C
Total Power Dissipation @ T_A = 25°C (Note 1)
Total Power Dissipation @ T_A = 25°C (Note 2)
Operating and Storage Temperature Range
V_DSS
V_DGR
V_GS
V_GS
I_D
I_D
I_DM
P_D
T_J, T_stg
60
60
"20
"30
20
10
60
60
0.40
1.88
1.36
−55 to
175
Vdc
Vdc
Vdc
Adc
Apk
W
W/°C
W
W
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 25 Vdc, V_GS = 10 Vdc,
L = 1.0 mH, I_L(pk) = 18.4 A, V_DS = 60 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
E_AS
R_qJC
R_qJA
R_qJA
T_L
170 mJ
°C/W
2.5
80
110
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using the 0.5 sq in drain pad size.
© Semiconductor Components Industries, LLC, 2011
1
August, 2011 − Rev. 8
http://onsemi.com
V_(BR)DSS
60 V
R_DS(on) TYP
37.5 mW
I_D MAX
20 A
N−Channel
D
G
S
12
3
MARKING
DIAGRAM
4
Drain
4
DPAK
CASE 369C
STYLE 2
1
Gate
2
Drain
3
Source
20N06
Y
WW
G
= Device Code
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NTD20N06/D