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NTB75N03L09T4G Datasheet, PDF (1/8 Pages) ON Semiconductor – Power MOSFET 75 Amps, 30 Volts
NTD2955, NVD2955
Power MOSFET
−60 V, −12 A, P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. Designed for low−voltage, high−
speed switching applications in power supplies, converters, and power
motor controls. These devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer an additional safety margin against unexpected
voltage transients.
Features
• Avalanche Energy Specified
• IDSS and VDS(on) Specified at Elevated Temperature
• Designed for Low−Voltage, High−Speed Switching Applications and
to Withstand High Energy in the Avalanche and Commutation Modes
• NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
VDSS
−60
Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤ 10 ms)
VGS
± 20
Vdc
VGSM
± 25
Vpk
Drain Current
Drain Current − Continuous @ Ta = 25°C
ID
Drain Current − Single Pulse (tp ≤ 10 ms)
IDM
−12
Adc
−18
Apk
Total Power Dissipation @ Ta = 25°C
PD
55
W
Operating and Storage Temperature
Range
TJ, Tstg −55 to
°C
175
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak
IL = 12 Apk, L = 3.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
EAS
RqJC
RqJA
RqJA
216
mJ
2.73 °C/W
71.4
100
Maximum Lead Temperature for Soldering
TL
Purposes, 1/8 in. from case for
10 seconds
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 1 in pad size
(Cu area = 1.127 in2).
2. When surface mounted to an FR4 board using the minimum recommended
pad size (Cu area = 0.412 in2).
http://onsemi.com
V(BR)DSS
−60 V
RDS(on) TYP
155 mW @ −10 V, 6 A
ID MAX
−12 A
P−Channel
D
G
S
MARKING DIAGRAMS
4
12
3
DPAK
CASE 369C
STYLE 2
4
Drain
4
Drain
1
Gate
2
Drain
3
Source
1
Gate
2
Drain
3
Source
4
4
Drain
1
2
3
DPAK−3
CASE 369D
STYLE 2
12 3
Gate Drain Source
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
August, 2013 − Rev. 13
Publication Order Number:
NTD2955/D