NLX1G125 Datasheet, PDF (1/7 Pages) ON Semiconductor – Non-Inverting 3-State Buffer

NLX1G125
Non-Inverting 3-State Buffer
The NLX1G125 is an advanced high−speed 2−input CMOS
non−inverting 3−state buffer in ultra−small footprint.
The NLX1G125 input structures provide protection when voltages
up to 7.0 V are applied, regardless of the supply voltage.
Features
• High Speed: t_PD = 2.7 ns (Typ) @ V_CC = 5.0 V
• Designed for 1.65 V to 5.5 V V_CC Operation
• Low Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
• 24 mA Balanced Output Source and Sink Capability
• Balanced Propagation Delays
• Overvoltage Tolerant (OVT) Input Pins
• Ultra−Small Packages
• These are Pb−Free Devices
OE 1
IN A 2
GND 3
5
V_CC
4 OUT Y
Figure 1. Pinout (Top View)
OE
EN
IN A
OUT Y
Figure 2. Logic Symbol
http://onsemi.com
MARKING
DIAGRAM
5 PIN FLIP−CHIP
CASE 499BG
XXXX
AYWW
A1
XXXX
A
Y
WW
= Specific Device Code
= Assembly Location
= Year
= Work Week
PIN ASSIGNMENT
1
OE
2
IN A
3
GND
4
OUT Y
5
V_CC
FUNCTION TABLE
A Input
OE Input
Y Output
L
L
L
H
L
H
X
H
Z
X = Don’t Care
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
December, 2009 − Rev. P0
Publication Order Number:
NLX1G125/D