NLU1GT125 Datasheet, PDF (1/8 Pages) ON Semiconductor – Non-Inverting 3-State Buffer, TTL Level LSTTL-Compatible Inputs

NLU1GT125
Non-Inverting 3-State
Buffer, TTL Level
LSTTL-Compatible Inputs
The NLU1GT125 MiniGatet is an advanced CMOS high-speed
non-inverting buffer in ultra-small footprint.
The NLU1GT125 requires the 3-state control input OE to be set
High to place the output in the high impedance state.
The device input is compatible with TTL-type input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT125 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply
voltage.
Features
•ăHigh Speed: t_PD = 3.8 ns (Typ) @ V_CC = 5.0 V
•ăLow Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
•ăTTL-Compatible Input: V_IL = 0.8 V; V_IH = 2.0 V
•ăCMOS-Compatible Output:
V_OH > 0.8 V_CC; V_OL < 0.1 V_CC @ Load
•ăPower Down Protection Provided on inputs
•ăBalanced Propagation Delays
•ăUltra-Small Packages
•ăThese are Pb-Free Devices
OE 1
6 V_CC
IN A 2
5 NC
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
OE
IN A
OUT Y
Figure 2. Logic Symbol
http://onsemi.com
MARKING
DIAGRAMS
UDFN6
MU SUFFIX
7M
CASE 517AA
1
ULLGA6
1.0 x 1.0
7M
CASE 613AD
1
ULLGA6
1.2 x 1.0
7M
CASE 613AE
1
ULLGA6
1.45 x 1.0
7M
CASE 613AF
1
7 = Device Marking
M = Date Code
PIN ASSIGNMENT
1
OE
2
IN A
3
GND
4
OUT Y
5
NC
6
V_CC
FUNCTION TABLE
Input
A
OE
Output
Y
L
L
L
H
L
H
X
H
Z
©Ă Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
1
Publication Order Number:
NLU1GT125/D