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NLSX5014_16 Datasheet, PDF (1/14 Pages) ON Semiconductor – 4-Bit 100 Mb/s Configurable Dual-Supply Level Translator
NLSX5014
4-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX5014 is a 4-bit configurable dual-supply autosensing
bidirectional level translator that does not require a direction control
pin. The I/O VCC- and I/O VL-ports are designed to track two
different power supply rails, VCC and VL respectively. Both the VCC
and the VL supply rails are configurable from 0.9 V to 4.5 V. This
allows a logic signal on the VL side to be translated to either a higher
or a lower logic signal voltage on the VCC side, and vice-versa.
The NLSX5014 offers the feature that the values of the VCC and
VL supplies are independent. Design flexibility is maximized
because VL can be set to a value either greater than or less than the
VCC supply. In contrast, the majority of competitive auto sense
translators have a restriction that the value of the VL supply must be
equal to less than (VCC - 0.4) V.
The NLSX5014 has high output current capability, which allows
the translator to drive high capacitive loads such as most high
frequency EMI filters. Another feature of the NLSX5014 is that each
I/O_VLn and I/O_VCCn channel can function as either an input or an
output.
An Output Enable (EN) input is available to reduce the power
consumption. The EN pin can be used to disable both I/O ports by
putting them in 3-state which significantly reduces the supply current
from both VCC and VL. The EN signal is referenced to the VL supply.
Features
• Wide VCC, VL Operating Range: 0.9 V to 4.5 V
• VL and VCC are independent
− VL may be greater than, equal to, or less than VCC
• High 100 pF Capacitive Drive Capability
• High−Speed with 140 Mb/s Guaranteed Date Rate
for VCC, VL > 1.8 V
• Low Bit−to−Bit Skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Powerup Sequencing
• Power−Off Protection
• Small packaging: 1.7 mm x 2.0 mm UQFN12, SOIC14, TSSOP14
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
Important Information
• ESD Protection for All Pins:
♦ HBM (Human Body Model) > 7000 V
www.onsemi.com
MARKING
DIAGRAMS
1
UQFN12
MU SUFFIX
CASE 523AE
AAMG
G
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
NLSX5014G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
NLSX
5014
ALYWG
G
1
A
=
Assembly Location
WL, L =
Wafer Lot
YY, Y =
Year
WW, W =
Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NLSX5014MUTAG UQFN12 3000/Tape & Reel
(Pb−Free)
NLSX5014DR2G
SO−14 2500/Tape & Reel
(Pb−Free)
NLSX5014DTR2G TSSOP14 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
1
August, 2016 − Rev. 6
Publication Order Number:
NLSX5014/D