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NLSX5011 Datasheet, PDF (1/13 Pages) ON Semiconductor – 1-Bit 100 Mb/s Configurable Dual-Supply Level Translator
NLSX5011
1-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX5011 is a 1-bit configurable dual-supply autosensing
bidirectional level translator that does not require a direction control
pin. The I/O VCC- and I/O VL-ports are designed to track two
different power supply rails, VCC and VL respectively. Both the VCC
and the VL supply rails are configurable from 0.9 V to 4.5 V. This
allows a logic signal on the VL side to be translated to either a higher
or a lower logic signal voltage on the VCC side, and vice-versa.
The NLSX5011 offers the feature that the values of the VCC and VL
supplies are independent. Design flexibility is maximized because
VL can be set to a value either greater than or less than the VCC
supply. In contrast, the majority of competitive auto sense translators
have a restriction that the value of the VL supply must be equal to less
than (VCC - 0.4) V.
The NLSX5011 has high output current capability, which allows
the translator to drive high capacitive loads such as most high
frequency EMI filters. Another feature of the NLSX5011 is that each
I/O_VLn and I/O_VCCn channel can function as either an input or an
output.
An Output Enable (EN) input is available to reduce the power
consumption. The EN pin can be used to disable both I/O ports by
putting them in 3-state which significantly reduces the supply current
from both VCC and VL. The EN signal is referenced to the VL supply.
Features
• Wide VCC, VL Operating Range: 0.9 V to 4.5 V
• VL and VCC are independent
− VL may be greater than, equal to, or less than VCC
• High 100 pF Capacitive Drive Capability
• High−Speed with 140 Mb/s Guaranteed Date Rate
for VCC, VL > 1.8 V
• Low Bit−to−Bit Skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Power−Up Sequencing
• Power−Off Protection
• Small packaging: ULLGA6 & UDFN6 Packages
• These are Pb−Free Devices
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
Important Information
• ESD Protection for All Pins:
♦ HBM (Human Body Model) > 8000 V
http://onsemi.com
MARKING
DIAGRAMS
UDFN6
M
MU SUFFIX
CASE 517AA
G
1
P = Specific Device Code
M = Date Code
G = Pb−Free Package
ULLGA6
AMX1 SUFFIX
CASE 613AE
AJ M
G
1
AJ = Specific Device Code
M = Date Code
G = Pb−Free Package
ULLGA6
M
BMX1 SUFFIX
G
CASE 613AF
1
E = Specific Device Code
M = Date Code
G = Pb−Free Package
ORDERING INFORMATION
Device
Package Shipping†
NLSX5011MUTCG
UDFN6 3000/Tape &
(Pb−Free)
Reel
NLSX5011AMX1TCG ULLGA6 3000/Tape &
(Pb−Free)
Reel
NLSX5011BMX1TCG ULLGA6 3000/Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
1
July, 2010 − Rev. 0
Publication Order Number:
NLSX5011/D