NLSF308_06 Datasheet, PDF (1/5 Pages) ON Semiconductor – Quad 2−Input AND Gate

NLSF308
Quad 2−Input AND Gate
The NLSF308 is an advanced high speed CMOS 2−input AND gate
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t_PD = 4.3 ns (Typ) at V_CC = 5.0 V
• Low Power Dissipation: I_CC = 2.0 mA (Max) at T_A = 25°C
• High Noise Immunity: V_NIH = V_NIL = 28% V_CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V_OLP = 0.8 V (Max)
• Function Compatible with Other Standard Logic Families
• QFN−16 Package
• Latchup Performance Exceeds 300 mA
• ESD Performance: Human Body Model; > 2000 V;
Machine Model; > 200 V
• Chip Complexity: 24 FETs or 6 Equivalent Gates
• Pb−Free Package is Available*
http://onsemi.com
1
QFN−16
MN SUFFIX
CASE 485G
MARKING DIAGRAM
ÇÇÇ1 ÇÇÇ16 ÇÇÇNLSF
308
ALYW G
G
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
L
L
H
L
H
L
L
H
H
H
NLSF308 = Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping^†
NLSF308MNR2 QFN−16 3000 / Tape & Reel
NLSF308MNR2G QFN−16 3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
May, 2006 − Rev. 4
Publication Order Number:
NLSF308/D