NDDL1N60Z Datasheet, PDF (1/5 Pages) ON Semiconductor – N-Channel Power MOSFET

NDDL1N60Z, NDTL1N60Z
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N-Channel Power MOSFET
600 V, 15 W
Features
• 100% Avalanche Tested
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
ABSOLUTE MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Parameter
Symbol NDD NDT Unit
Drain−to−Source Voltage
Continuous Drain Current R_qJC
Steady State, T_C = 25°C (Note 1)
Continuous Drain Current R_qJC
Steady State, T_C = 100°C (Note 1)
Pulsed Drain Current, t_p = 10 ms
Power Dissipation – R_qJC
Steady State, T_C = 25°C
Gate−to−Source Voltage
Single Pulse Drain−to−Source
Avalanche Energy (I_PK = 1.0 A)
Peak Diode Recovery (Note 2)
V_DSS
I_D
I_D
I_DM
P_D
V_GS
EAS
dv/dt
600
V
0.8 0.3 A
0.5 0.15 A
3.2 1.0 A
25
3
W
±30
V
60
mJ
4.5
V/ns
Source Current (Body Diode)
Lead Temperature for Soldering
Leads
I_S
0.5 0.3 A
T_L
260
°C
Operating Junction and Storage
Temperature
T_J, T_STG −55 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Limited by maximum junction temperature
2. I_S = 1.5 A, di/dt ≤ 100 A/ms, V_DD ≤ BV_DSS
THERMAL RESISTANCE
Parameter
Symbol Value Unit
Junction−to−Case (Drain)
NDDL1N60Z
Junction−to−Ambient (Note 4) NDDL1N60Z
(Note 3) NDDL1N60Z−1
(Note 4) NDTL1N60Z
(Note 5) NDTL1N60Z
R_qJC
R_qJA
5
°C/W
50 °C/W
96
62
151
3. Insertion mounted.
4. Surface−mounted on FR4 board using 1” sq. pad size
(Cu area = 1.127” sq. [2 oz] including traces).
5. Surface−mounted on FR4 board using minimum recommended pad size
(Cu area = 0.026” sq. [2 oz]).
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2013
1
May, 2013 − Rev. P1
http://onsemi.com
V_(BR)DSS
600 V
R_DS(ON) MAX
15 W @ 10 V
N−Channel MOSFET
D (2)
G (1)
S (3)
MARKING DIAGRAMS
4
Drain
12
3
4
DPAK
CASE 369C
STYLE 2
2
1 ^Drain 3
Gate Source
4
4
Drain
IPAK
CASE 369D
STYLE 2
1
2
3
Y
= Year
WW = Work Week
G
= Pb−Free Package
1 23
Gate Drain Source
1 ₂₃
A
Y
W
01N60
G
Drain
4
SOT−223
4
CASE 318E
STYLE 3
AYW
L1N60ZG
= Assembly Location
G
= Year
12 3
= Work Week
= Specific Device Code
Gate Drain Source
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NDDL1N60Z/D