NCP5220 Datasheet, PDF (1/18 Pages) ON Semiconductor – 3−in−1 PWM Dual Buck and Linear Power Controller

NCP5220
3−in−1 PWM Dual Buck and
Linear Power Controller
The NCP5220 3−in−1 PWM a Dual Buck and Linear Power
Controller, is a complete power solution for MCH and DDR memory.
This IC combines the efficiency of PWM controllers for the VDDQ
supply and the MCH core supply voltage with the simplicity of linear
regulator for the VTT termination voltage.
This IC contains two synchronous PWM buck controller for driving
four external N−Ch FETs to form the DDR memory supply voltage
(VDDQ) and the MCH regulator. The DDR memory termination
regulator (VTT) is designed to track at the half of reference voltage
with sourcing and sinking current.
Protective features include, soft−start circuitry, undervoltage
monitoring of 5VDUAL, BOOT voltage and thermal shutdown. The
device is housed in a thermal enhanced space−saving DFN−20
package.
Features
• Pb−Free Package is Available*
• Incorporates Synchronous PWM Buck Controllers for VDDQ and
VMCH
• Integrated Power FETs with VTT Regulator Source/Sink up to 2.0 A
• All External Power MOSFETs are N−Channel
• Adjustable VDDQ and VMCH by External Dividers
• VTT Tracks at Half the Reference Voltage
• Fixed Switching Frequency of 250 kHz for VDDQ and VMCH
• Doubled Switching Frequency of 500 kHz for VDDQ Controller in
Standby Mode to Optimize Inductor Current Ripple and Efficiency
• Soft−Start Protection for All Controllers
• Undervoltage Monitor of Supply Voltages
• Overcurrent Protections for DDQ and VTT Regulators
• Fully Complies with ACPI Power Sequencing Specifications
• Short Circuit Protection Prevents Damage to Power Supply Due to
Reverse DIMM Insertion
• Thermal Shutdown
• 5x6 DFN−20 Package
Typical Applications
• DDR I and DDR II Memory and MCH Power Supply
http://onsemi.com
MARKING
20
DIAGRAM
1
DFN−20
MN SUFFIX
CASE 505AB
NCP5220
AWLYYWW
1
NCP5220 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
PIN CONNECTIONS
COMP
FBDDQ
SS
PGND
VTT
VDDQ
AGND
FBVTT
SLP_S5
FB1P5
SW_DDQ
BG_DDQ
TG_DDQ
BOOT
5VDUAL
COMP_1P5
SLP_S3
TG_1P5
BG_1P5
GND_1P5
NOTE: Pin 21 is the thermal pad
on the bottom of the device.
ORDERING INFORMATION
Device
Package
Shipping†
NCP5220MNR2 DFN−20 2500 Tape & Reel
NCP5220MNR2G DFN−20 2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2004
1
November, 2004 − Rev. 4
Publication Order Number:
NCP5220/D