NCP5218 Datasheet, PDF (1/31 Pages) ON Semiconductor – 2−in−1 Notebook DDR Power Controller

NCP5218
2−in−1 Notebook DDR
Power Controller
The NCP5218 2−in−1 Notebook DDR Power Controller is
specifically designed as a total power solution for notebook DDR
memory system. This IC combines the efficiency of a PWM
controller for the V_DDQ supply with the simplicity of linear
regulators for the V_TT termination voltage and the buffered low noise
reference. This IC contains a synchronous PWM buck controller for
driving two external NFETs to form the DDR memory supply
voltage (V_DDQ). The DDR memory termination regulator output
voltage (V_TT) and the buffered V_REF are internally set to track at the
half of V_DDQ. An internal power good voltage monitor tracks V_DDQ
output and notifies the user whether the V_DDQ output is within target
range. Protective features include soft−start circuitries, undervoltage
monitoring of supply voltage, V_DDQ overcurrent protection, V_DDQ
overvoltage and undervoltage protections, and thermal shutdown.
The IC is packaged in DFN22.
Features
• Incorporates V_DDQ, V_TT Regulator, Buffered V_REF
• Adjustable V_DDQ Output
• V_TT and V_REF Track V_DDQ/2
• Operates from Single 5.0 V Supply
• Supports V_DDQ Conversion Rails from 4.5 V to 24 V
• Power−saving Mode for High Efficiency at Light Load
• Integrated Power FETs with V_TT Regulator Sourcing/Sinking
1.5 A DC and 2.4 A Peak Current
• Requires Only 20 mF Ceramic Output Capacitor for V_TT
• Buffered Low Noise 15 mA V_REF Output
• All External Power MOSFETs are N−channel
• <5.0 mA Current Consumption During Shutdown
• Fixed Switching Frequency of 400 kHz
• Soft−start Protection for V_DDQ and V_TT
• Undervoltage Monitor of Supply Voltage
• Overvoltage Protection and Undervoltage Protection for V_DDQ
• Short−circuit Protection for V_DDQ and V_TT
• Thermal Shutdown
• Housed in DFN22
• This is a Pb−Free Device
Typical Applications
• Notebook DDR/DDR2 Memory Supply and Termination Voltage
• Active Termination Busses (SSTL−18, SSTL−2, SSTL−3)
http://onsemi.com
MARKING
DIAGRAM
1
22 ^DFN22
MN SUFFIX
NCP5218
CASE 506AF
AWLYYWW
1
G
NCP5218= Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
PIN CONNECTIONS
VDDQEN
VTTEN
FPWM
SS
VTTGND
VTT
VTTI
FBVTT
AGND
DDQREF
VCCA
(Top View)
PGND
BGDDQ
VCCP
SWDDQ
TGDDQ
BOOST
OCDDQ
PGOOD
VTTREF
FBDDQ
COMP
NOTE: Pin 23 is the thermal pad on
the bottom of the device.
ORDERING INFORMATION
Device
Package
Shipping†
NCP5218MNR2G DFN22 2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
1
January, 2007 − Rev. 0
Publication Order Number:
NCP5218/D