NCP5214 Datasheet, PDF (1/14 Pages) ON Semiconductor – 2-in-1 Notebook DDR Power Controller

NCP5214
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2−in−1 Notebook DDR
Power Controller
The NCP5214 2−in−1 Notebook DDR Power Controller is
specifically designed as a total power solution for notebook DDR
memory system. This IC combines the efficiency of a PWM
controller for the VDDQ supply with the simplicity of linear
regulators for the VTT termination voltage and the buffered low
noise reference. This IC contains a synchronous PWM buck
controller for driving two external NFETs to form the DDR memory
supply voltage (VDDQ). The DDR memory termination regulator
output voltage (VTT) and the buffered VREF are internally set to
track at the half of VDDQ. An internal power good voltage monitor
tracks VDDQ output and notifies the user whether the VDDQ output
is within target range. Protective features include soft−start
circuitries, undervoltage monitoring of supply voltage, VDDQ
overcurrent protection, VDDQ overvoltage and undervoltage
protections, and thermal shutdown. The IC is packaged in DFN−22.
Features
• Incorporates VDDQ, VTT Regulator, Buffered VREF
• Adjustable VDDQ Output
• VTT and VREF Track VDDQ/2
• Operates from Single 5.0 V Supply
• Supports VDDQ Conversion Rails from 5.0 V to 24 V
• Power−saving Mode for High Efficiency at Light Load
• Integrated Power FETs with VTT Regulator Sourcing/Sinking 1.5 A
DC and 2.4 A Peak Current
• Buffered Low Noise 15 mA VREF Output
• All External Power MOSFETs are N−channel
• <5.0 mA Current Consumption During Shutdown
• Fixed Switching Frequency of 400 kHz
• Soft−start Protection for VDDQ and VTT
• Undervoltage Monitor of Supply Voltage
• Overvoltage Protection and Undervoltage Protection for VDDQ
• Short−circuit Protection for VDDQ and VTT
• Thermal Shutdown
• Housed in DFN−22
Typical Applications
• Notebook DDR/DDR2 Memory Supply and Termination Voltage
• Active Termination Busses (SSTL−18, SSTL−2, SSTL−3)
http://onsemi.com
MARKING
DIAGRAM
1
22 ^DFN−22
MN SUFFIX
NCP5214
CASE 506AF
AWLYYWW
1
NCP5214 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
PIN CONNECTIONS
VDDQEN
VTTEN
FPWM
SS
VTTGND
VTT
VTTI
FBVTT
AGND
DDQREF
VCCA
PGND
BGDDQ
VCCP
SWDDQ
TGDDQ
BOOST
OCDDQ
PGOOD
VTTREF
FBDDQ
COMP
(Top View)
NOTE: Pin 23 is the thermal pad on
the bottom of the device.
ORDERING INFORMATION
Device
Package
Shipping†
NCP5214MNR2 DFN−22 2500 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2005
1
April, 2005 − Rev. P0
Publication Order Number:
NCP5214/D