NCP500 Datasheet, PDF (1/20 Pages) ON Semiconductor – 150 mA CMOS Low Noise Low-Dropout Voltage Regulator

NCP500
150 mA CMOS Low Noise
Low−Dropout Voltage
Regulator
The NCP500 series of fixed output low dropout linear regulators are
designed for portable battery powered applications which require low
noise operation, fast enable response time, and low dropout. The
device achieves its low noise performance without the need of an
external noise bypass capacitor. Each device contains a voltage
reference unit, an error amplifier, a PMOS power transistor, and
resistors for setting output voltage, and current limit and temperature
limit protection circuits.
The NCP500 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 1.0 mF.
Features
• Ultra−Low Dropout Voltage of 170 mV at 150 mA
• Fast Enable Turn−On Time of 20 msec
• Wide Operating Voltage Range of 1.8 V to 6.0 V
• Excellent Line and Load Regulation
• High Accuracy Output Voltage of 2.5%
• Enable Can Be Driven Directly by 1.0 V Logic
• Typical RMS Noise Voltage 50 mV with No Bypass Capacitor
(BW = 10 Hz to 100 kHz)
• Very Small QFN 2x2 Package
• Pb−Free Package May be Available.* The G−Suffix Denotes a
Pb−Free Lead Finish
Typical Applications
• Noise Sensitive Circuits − VCO’s, RF Stages, etc.
• SMPS Post−Regulation
• Hand−Held Instrumentation
• Camcorders and Cameras
V_in
1 (3)
Thermal
Shutdown
Driver w/
Current
Limit
Enable
ON ^{3 (1)}
V_out
5 (4)
OFF
GND 2 (2, 5)
NOTE: Pin numbers in parenthesis indicate QFN package.
Figure 1. Simplified Block Diagram
© Semiconductor Components Industries, LLC, 2004
1
January, 2004 − Rev. 16
http://onsemi.com
5
1
TSOP−5
SN SUFFIX
CASE 483
1
6
QFN 2x2
SQL SUFFIX
CASE 488
PIN CONNECTIONS AND
MARKING DIAGRAMS
TSOP−5
V_in 1
GND 2
5 V_out
Enable 3
4 N/C
(Top View)
QFN 2x2
Enable ₁
6 N/C
GND 2
V_{in 3}
xxM
5 GND
4 ^Vout
(Top View)
xxx, xx
Y
W
M
= Version
= Year
= Work Week
= Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Publication Order Number:
NCP500/D