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NCN6804 Datasheet, PDF (1/25 Pages) ON Semiconductor – Dual Smart Card Interface IC with SPI Programming Interface
NCN6804
Dual Smart Card Interface
IC with SPI Programming
Interface
The NCN6804 is a dual interface IC with serial control. It is
dedicated for Smart Card/Secure Access Module (SAM) reader/writer
applications. It allows the management of two external ISO/EMV
cards (Class A, B or C). An SPI bus is used to control and configure
the dual interface. The cards are controlled in a multiplexed mode.
Two NCN6804 devices (4 smart card interfaces) can share one single
control bus thanks to a dedicated hardware address pin (S1).
An accurate protection system guarantees timely and controlled
shutdown in the case of external error conditions.
This device is an enhanced version of the NCN6004A, more
compact, more flexible and fully compatible with the NCN6001, its
single interface counterpart version. It is fully compatible with ISO
7816−3, EMV and GIE−CB standards.
Features
• Dual Smart Card / SAM Interface with SPI Programming Bus
• Fully Compatible with ISO 7816−3, EMV and GIE−CB Standards
• One Protected Bidirectional Buffered I/O Line per Card Port
• Wide Power Supply Voltage Range: 2.7V < VDDPA/B & VDD < 5.5V
• Programmable/Independent CRD_VCC Supply for Each Smart Card
• Multiplexed Mode of Operating
• Handles 1.8 V, 3.0 V and 5.0 V Smart Cards
• Programmable Rise & Fall Card Clock Slopes (Slow & Fast Modes)
• Support up to 40 MHz Clock with Internal Programmable Clock
(division ratio 1/1, 1/2, 1/4) Managed Independently for Each Card
• Built−in Programmable CRD_CLK Stop Function handles Low State
• ESD Protection on Card pins (8 kV, Human Body Model)
• Activation / Deactivation built−in Sequencer
• Internal I/O Pull−up Resistor with Resistor Disconnection Option
(EN_RPU)
• 4–Wire Series Bus Interface – SPI
• QFN32 (5x5 mm2) Package
• This is a Pb−Free Device
Typical Application
• Point Of Sales (POS) and Transaction Terminals
• ATM (Automatic Teller Machine) / Banking Terminal Interfaces
• Set Top Box Decoder and Pay TV
http://onsemi.com
1 32
QFN32
CASE 488AM
MARKING
DIAGRAM
1
NCN
6804
ALYWG
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTIONS
32 31 30 29 28 27 26 25
S1 1
CRD_DETA 2
CRD_C4A 3
CRD_C8A 4
CRD_I/OA 5
CRD_RSTA 6
CRD_CLKA 7
CRD_VCCA 8
EXPOSED PAD
33
GNDD
24 INT
23 CRD_DETB
22 CRD_C4B
21 CRD_C8B
20 CRD_I/OB
19 CRD_RSTB
18 CRD_CLKB
17 CRD_VCCB
9 10 11 12 13 14 15 16
ORDERING INFORMATION
Device
Package
Shipping†
NCN6804MNR2G QFN32
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2008
1
December, 2008 − Rev. 1
Publication Order Number:
NCN6804/D