NBSG11_06 Datasheet, PDF (1/12 Pages) ON Semiconductor – 2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outputs

NBSG11
2.5V/3.3V SiGe 1:2
Differential Clock Driver
with RSECL* Outputs
*Reduced Swing ECL
Description
The NBSG11 is a 1−to−2 differential fanout buffer, optimized for
low skew and Ultra−Low JITTER.
Inputs incorporate internal 50 W termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), CML, LVCMOS,
LVTTL, or LVDS. Outputs are RSECL (Reduced Swing ECL),
400 mV.
Features
• Maximum Input Clock Frequency up to 12 GHz Typical
• Maximum Input Data Rate up to 12 Gb/s Typical
• 30 ps Typical Rise and Fall Times
• 125 ps Typical Propagation Delay
• RSPECL Output with Operating Range: V_CC = 2.375 V to 3.465 V
with V_EE = 0 V
• RSNECL Output with RSNECL or NECL Inputs with
Operating Range: V_CC = 0 V with V_EE = −2.375 V to −3.465 V
• RSECL Output Level (400 mV Peak−to−Peak Output), Differential
Output Only
• 50 W Internal Input Termination Resistors
• Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
• Pb−Free Packages are Available
http://onsemi.com
MARKING DIAGRAMS*
FCBGA−16
BA SUFFIX
CASE 489
QFN−16
MN SUFFIX
CASE 485G
SG
11
ALYW
16
ÇÇÇÇ 1
SG11
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 8
Publication Order Number:
NBSG11/D