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NBLVEP16VR Datasheet, PDF (1/14 Pages) ON Semiconductor – 2.5V/3.3V/5V ECL Differential Receiver/Driver with Oscillator Gain Stage and Enabled High Gain Outputs
NBLVEP16VR
2.5V/3.3V/5V ECL
Differential Receiver/Driver
with Oscillator Gain Stage
and Enabled High Gain
Outputs
http://onsemi.com
The NBLVEP16VR is an ECL/LVPECL oscillator gain stage with
MARKING DIAGRAM
high−gain output buffers, selectable output enable and a feedback
buffer. The NBLVEP16VR is a solution for crystal oscillators and
SAW−based voltage−controlled oscillators.
• Q and Q Outputs have Selectable 4 mA or 8 mA, Self Bias Current
Sources
• QHG and QHG have a Selectable 10 mA, Self Bias Current Sources
• Synchronous Output Enable of the High−Gain Outputs with
Bottom View
QFN−16
MN SUFFIX
CASE 485G
XXXX
XXXX
ALYW
XXXX = Device Code
A = Assembly Location
Selectable Disabled State
• Selectable LVCMOS/LVTTL or LVPECL Level Input of the Output
Enable Pin
• Maximum Frequency > 2.5 GHz Typical
• (LV)PECL Mode Operating Range: VCC = 2.375 V to 5.5 V with
VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with
VEE = −2.375 V to −5.5 V
• Temperature Compensated Inputs and Outputs
• Excellent Clock Input Sensitivity
• VBB Output Supports Current Source/Sink Capability up to a
Robust 1.5 mA
L = Wafer Lot
Y = Year
W = Work Week
ORDERING INFORMATION
Device
Package Shipping†
NBLVEP16VRMN
QFN−16 123 / Rail
NBLVEP16VRMNR2
QFN−16 3000/ Tape &
Reel
NBWLVEP16VR
Wafer
1. Contact Sales Representative.
Refer to
Note 1.
4 mA ea.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
4 mA ea. (opt.) Brochure, BRD8011/D.
CS_SEL
Q
VEE
Q
D
D
470 W
VBB
VBB_ADJ
OD_MODE
470 W
VBB
EN
1
Q
Q
0
LEN Q
LATCH
D
QHG
QHG
10 mA ea. (opt.)
VEEP
LVCMOS/LVTTL
Threshold
Figure 1. Logic Diagram
EN_SEL
© Semiconductor Components Industries, LLC, 2003
1
December, 2003 − Rev. 2
Publication Order Number:
NBLVEP16VR/D