NB7VQ1006M Datasheet, PDF (1/10 Pages) ON Semiconductor – 1.8V / 2.5V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs

NB7VQ1006M
1.8V / 2.5V 10Gbps
Equalizer Receiver with 1:6
Differential CML Outputs
Multi−Level Inputs w/ Internal Termination
Description
The NB7VQ1006M is a high performance differential 1:6 CML
fanout buffer with a selectable Equalizer receiver. When placed in
series with a Data path operating up to 10 Gb/s, the NB7VQ1006M
will compensate the degraded data signal transmitted across a FR4
PCB backplane or cable interconnect and output six identical CML
copies of the input signal. Therefore, the serial data rate is increased by
reducing Inter−Symbol Interference (ISI) caused by losses in copper
interconnect or long cables.
The EQualizer ENable pin (EQEN) allows the IN/IN inputs to either
flow through or bypass the Equalizer section. Control of the Equalizer
function is realized by setting EQEN; When EQEN is set Low, the
IN/IN inputs bypass the Equalizer. When EQEN is set High, the IN/IN
inputs flow through the Equalizer. The default state at startup is LOW.
As such, the NB7VQ1006M is ideal for SONET, GigE, Fiber Channel,
Backplane and other Data distribution applications.
The differential inputs incorporate internal 50 W termination
resistors that are accessed through the VT pin. This feature allows the
NB7VQ1006M to accept various logic level standards, such as
LVPECL, CML or LVDS. This feature provides transmission line
termination at the receiver, eliminating external components. The
outputs have the flexibility of being powered by either a 1.8 V or 2.5 V
supply.
The NB7VQ1006M is a member of the GigaComm™ family of high
performance Clock/Data products.
Features
• Maximum Input Data Rate > 10 Gbps
• Maximum Input Clock Frequency > 7.5 GHz
• Backplane and Cable Interconnect Compensation
• 225 ps Typical Propagation Delay
• 30 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV Peak−to−Peak, Typical
• Operating Range: V_CC = 1.71 V to 2.625 V, GND = 0 V
• Internal Input Termination Resistors, 50 W
• QFN−24 Package, 4 mm x 4 mm
• −40°C to +85°C Ambient Operating Temperature
• These are Pb−Free Devices*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
QFN−24
MN SUFFIX
CASE 485L
MARKING
DIAGRAM*
24
1
NB7V
Q1006M
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
EQ
SIMPLIFIED BLOCK DIAGRAM
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
1
June, 2010 − Rev. 2
Publication Order Number:
NB7VQ1006M/D