NB7N017M_16 Datasheet, PDF (1/19 Pages) ON Semiconductor – 3.3V SiGe 8‐Bit Dual Modulus Programmable Divider/Prescaler

NB7N017M
3.3 V SiGe 8‐Bit Dual
Modulus Programmable
Divider/Prescaler with CML
Outputs
Description
The NB7N017M is a high speed 8-bit dual modulus programmable
divider/prescaler with 16 mA CML outputs capable of switching at
input frequencies greater than 3.5 GHz. The CML output structure
contains internal 50 W source termination resistor to V_CC. The
device generates 400 mV output amplitude with 50 W receiver
resistor to V_CC. This I/O structure enables easy implementation of
the NB7N017M in 50 W systems.
The differential inputs contain 50 W termination resistors to VT
pads and all differential inputs accept RSECL, ECL, LVDS,
LVCMOS, LVTTL, and CML.
Internally, the NB7N017M uses a > 3.5 GHz 8-bit programmable
down counter. A select pin, SEL, is used to select between two
words, Pa[0:7] and Pb[0:7], that are stored in REGa and REGb
respectively. Two parallel load pins, PLa and PLb, are used to load
the level triggered programming registers, REGa and REGb,
respectively. A differential clock enable, CE, pin is available.
The NB7N017M offers a differential output, TC. Terminal count
output, TC, goes high for one clock cycle when the counter has
reached the all zeros state. To reduce output phase noise, TC is
retimed with the rising edge triggered latches.
Features
• Maximum Input Clock Frequency > 3.5 GHz Typical
• Differential CLK Clock Input
• Differential CE Clock Enable Input
• Differential SEL Word Select Input
• 50 W Internal Input and Output Termination Resistors
• Differential TC Terminal Count Output
• All Outputs 16 mA CML with 50 W Internal Source Termination
to V_CC
• All Single-Ended Control Pins CMOS and PECL/NECL Compatible
• Counter Programmed Using One of Two Single-Ended Words,
Pa[0:7] and Pb[0:7], Stored in REGa and REGb
• REGa and REGb Implemented with Level Triggered Latch
• Compatible with Existing 3.3 V LVEP, EP, and SG Devices
• Ability to Program the Divider without Disturbing Current Settings
• Positive CML Output Operating Range:
♦ V_CC = 3.0 V to 3.465 V with V_EE = 0 V
• Negative CML Output Operating Range:
♦ V_CC = 0 V with V_EE = –3.0 V to –3.465 V
• V_BB Reference Voltage Output
• CML Output Level: 400 mV Peak-Peak Output with 50 W Receiver
Resistor to V_CC
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
1 52
QFN−52
MN SUFFIX
CASE 485M−01
MARKING DIAGRAM*
52
1
NB7N
017M
AWLYYWWG
A
= Assembly Site
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
NB7N017MMNG
NB7N017MMNR2G
Package Shipping^†
QFN−52 260 Tray JEDEC
(Pb-Free)
QFN−52 2000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
August, 2016 − Rev. 5
Publication Order Number:
NB7N017M/D