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NB6N11S_06 Datasheet, PDF (1/9 Pages) ON Semiconductor – 3.3 V 1:2 AnyLevel TM Input to LVDS Fanout Buffer /Translator | |||
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NB6N11S
3.3 V 1:2 AnyLevelE Input
to LVDS Fanout Buffer /
Translator
Description
The NB6N11S is a differential 1:2 Clock or Data Receiver and will
accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL,
or LVDS. These signals will be translated to LVDS and two identical
copies of Clock or Data will be distributed, operating up to 2.0 GHz or
2.5 Gb/s, respectively. As such, the NB6N11S is ideal for SONET,
GigE, Fiber Channel, Backplane and other Clock or Data distribution
applications.
The NB6N11S has a wide input common mode range from
GND + 50 mV to VCC â 50 mV. Combined with the 50 W internal
termination resistors at the inputs, the NB6N11S is ideal for
translating a variety of differential or singleâended Clock or Data
signals to 350 mV typical LVDS output levels.
The NB6N11S is functionally equivalent to the EP11, LVEP11,
SG11 or 7L11M devices and is offered in a small, 3 mm X 3 mm,
16âQFN package. Application notes, models, and support
documentation are available at www.onsemi.com.
The NB6N11S is a member of the ECLinPS MAX⢠family of high
performance products.
Features
⢠Maximum Input Clock Frequency > 2.0 GHz
⢠Maximum Input Data Rate > 2.5 Gb/s
⢠1 ps Maximum of RMS Clock Jitter
⢠Typically 10 ps of Data Dependent Jitter
⢠380 ps Typical Propagation Delay
⢠120 ps Typical Rise and Fall Times
⢠Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and
SG Devices
⢠These are PbâFree Devices
http://onsemi.com
1
QFNâ16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB6N
11S
ALYW G
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbâFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q0
VTD
Q0
D
D
VTD
Q1
Q1
Figure 1. Logic Diagram
Device DDJ = 10 ps
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
TIME (58 ps/div)
Figure 2. Typical Output Waveform at 2.488 Gb/s with
PRBS 223â1 (VINPP = 400 mV; Input Signal DDJ = 14 ps)
© Semiconductor Components Industries, LLC, 2006
1
May, 2006 â Rev. 0
Publication Order Number:
NB6N11S/D
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