NB6L611 Datasheet, PDF (1/9 Pages) ON Semiconductor – 2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buffer

NB6L611
2.5V / 3.3V 1:2 Differential
LVPECL Clock / Data Fanout
Buffer
Multi−Level Inputs with Internal Termination
http://onsemi.com
Description
The NB6L611 is a differential 1:2 fanout buffer. The differential
inputs incorporate internal 50 W termination resistors that are accessed
through the VTD pins and will accept LVPECL, CML, LVDS,
LVCMOS or LVTTL logic levels.
The V_REFAC pin is an internally generated voltage supply available
to this device only. V_REFAC is used as a reference voltage for
single−ended PECL or NECL inputs. For all single−ended input
conditions, the unused complementary differential input is connected
to V_REFAC as a switching reference voltage. V_REFAC may also rebias
capacitor−coupled inputs. When used, decouple V_REFAC with a
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V_REFAC output should be left open.
The device is housed in a small 3x3 mm 16 pin QFN package.
The NB6L611 is a member of the ECLinPS MAX™ family of high
performance clock products.
Features
• Maximum Input Clock Frequency > 4.0 GHz, Typical
• 280 ps Typical Propagation Delay
• 100 ps Typical Rise and Fall Times
• 0.5 ps maximum RMS Clock Jitter
• Differential LVPECL Outputs, 780 mV Amplitude, typical
• LVPECL Operating Range: V_CC = 2.375 V to 3.63 V with V_EE = 0 V
• NECL Operating Range: V_CC = 0 V with V_EE = −2.375 V to −3.63 V
• Internal Input Termination Resistors, 50 W
• V_REFAC Reference Output Voltage
• Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP,
EP, and SG Devices
• −40°C to +85°C Ambient Operating Temperature
• These are Pb−Free Devices
QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB6L
611
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q0
VTD
Q0
D
D
Q1
VTD
Q1
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 0
Publication Order Number:
NB6L611/D