NB6L14S Datasheet, PDF (1/11 Pages) ON Semiconductor – 2.5 V 1:4 AnyLevel™ Differential Input to LVDS Fanout Buffer/Translator

NB6L14S
2.5 V 1:4 AnyLevel]
Differential Input to LVDS
Fanout Buffer/Translator
The NB6L14S is a differential 1:4 Clock or Data Receiver and will
accept AnyLevel differential input signals: LVPECL, CML, LVDS, or
HSCL. These signals will be translated to LVDS and four identical
copies of Clock or Data will be distributed, operating up to 2.0 GHz or
2.5 Gb/s, respectively. As such, the NB6L14S is ideal for SONET,
GigE, Fiber Channel, Backplane and other Clock or Data distribution
applications.
The NB6L14S has a wide input common mode range from
GND + 50 mV to V_CC − 50 mV. Combined with the 50 W internal
termination resistors at the inputs, the NB6L14S is ideal for translating
a variety of differential or single−ended Clock or Data signals to
350 mV typical LVDS output levels.
The NB6L14S is the 2.5 V version of the NB6N14S and is offered
in a small 3 mm x 3 mm 16−QFN package. Application notes, models,
and support documentation are available at www.onsemi.com.
The NB6L14S is a member of the ECLinPS MAX™ family of high
performance products.
Features
• Maximum Input Clock Frequency > 2.0 GHz
• Maximum Input Data Rate > 2.5 Gb/s
• 1 ps Maximum of RMS Clock Jitter
• Typically 10 ps of Data Dependent Jitter
• 380 ps Typical Propagation Delay
• 120 ps Typical Rise and Fall Times
• Single Power Supply; V_CC = 2.5 $ 5%
• V_{REF_AC} Reference Output
• These are Pb−Free Devices
Device DDJ = 10 ps
http://onsemi.com
1
QFN−16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB6L
14S
ALYW G
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q0
Q0
Q1
IN
VT
IN
50 W
50 W
Q1
Q2
Q2
EN
DQ
(LVTTL/CMOS)
Q3
V_REFAC
Q3
Figure 1. Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
TIME (58 ps/div)
Figure 2. Typical Output Waveform at 2.488 Gb/s with
PRBS 2^23−1 (V_INPP = 400 mV; Input Signal DDJ = 14 ps)
© Semiconductor Components Industries, LLC, 2009
1
June, 2009 − Rev. 0
Publication Order Number:
NB6L14S/D