NB4L6254_09 Datasheet, PDF (1/11 Pages) ON Semiconductor – 2.5V / 3.3V Differential LVPECL 2x2 Clock Switch and Low Skew Fanout Buffer

NB4L6254
2.5V / 3.3V Differential
LVPECL 2x2 Clock Switch
and Low Skew Fanout
Buffer
Description
The NB4L6254 is a differential 2x2 clock switch and drives
precisely aligned clock signals through its LVPECL fanout buffers. It
employs a fully differential architecture with bipolar technology,
offers superior digital signal characteristics, has very low clock output
skew and supports clock frequencies from DC up to 3.0 GHz.
The NB4L6254 is designed for the most demanding, skew critical
differential clock distribution systems. Typical applications for the
NB4L6254 are clock distribution, switching and data loopback
systems of high−performance computer, networking and
telecommunication systems, as well as on−board clocking of OC−3,
OC−12 and OC−48 communication systems. In addition, the
NB4L6254 can be configured as a single 1:6 or dual 1:3 LVPECL
fanout buffer.
The NB4L6254 can be operated from a single 3.3 V or 2.5 V power
supply.
Features
• Maximum Clock Input Frequency, 3 GHz
• Maximum Input Data Rate, 3 Gb/s
• Differential LVPECL Inputs and Outputs
• Low Output Skew: 50 ps Maximum Output−to−Output Skew
• Synchronous Output Enable Eliminating Output Runt Pulse
Generation and Metastability
CLK0
• Operating Range: Single 3.3 V or 2.5 V Supply
CLK0
V_CC = 2.375 V to 3.465 V
• LVCMOS Compatible Control Inputs
• Packaged in LQFP−32
• Fully Differential Architecture
CLK1
• −40°C to 85°C Ambient Operating Temperature
CLK1
• These are Pb−Free Devices*
SEL0
SEL1
OEA
OEB
http://onsemi.com
MARKING DIAGRAMS*
LQFP−32
FA SUFFIX
CASE 873A
NB4L
6254
AWLYYWWG
1
1 32
NB4L6254
AWLYYWWG
G
QFN32
MN SUFFIX
CASE 488AM
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
V_CC
Bank A
0
1
QA0
QA0
QA1
QA1
QA2
QA2
V_CC
Bank B
0
1
QB0
QB0
QB1
QB1
QB2
QB2
SYNC
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Figure 1. Functional Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
1
March, 2009 − Rev. 3
Publication Order Number:
NB4L6254/D