NB4L16MMNEVB Datasheet, PDF (1/12 Pages) ON Semiconductor – 2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver/Receiver/Buffer/ Translator with Internal Termination

NB4L16M
2.5 V/3.3 V, 5 Gb/s Multi Level
Clock/Data Input to CML
Driver/Receiver/Buffer/
Translator with Internal
Termination
www.onsemi.com
Description
The NB4L16M is a differential driver/receiver/buffer/translator
which can accept LVPECL, LVDS, CML, HSTL, LVCMOS/LVTTL
and produce 400 mV CML output. The device is capable of receiving,
buffering, and translating a clock or data signal that is as small as
75 mV operating up to 3.5 GHz or 5.0 Gb/s, respectively. As such, it is
ideal for SONET, GigE, Fiber Channel and backplane applications
(see Table 6 and Figures 20, 21 22, and 23).
Differential inputs incorporate internal 50 W termination resistors
and accept LVPECL (Positive ECL), LVTTL/LVCMOS, CML, HSTL
or LVDS. The differential 16 mA CML output provides matching
internal 50 W termination, and 400 mV output swing when externally
receiver terminated, 50 W to V_CC (see Figure 19). These features
provide transmission line termination on chip, at the receiver and
driver end, eliminating any use of additional external components.
The V_BB, an internally generated voltage supply, is available to this
device only. For single-ended input configuration, the unused
complementary differential input is connected to V_BB as a switching
reference voltage. The V_BB reference output can be used also to
re-bias capacitor coupled differential or single-ended output signals.
For the capacitor coupled input signals, V_BB should be connected to
the V_TD pin and bypassed to ground with a 0.01 mF capacitor. When
not used V_BB should be left open.
This device is housed in a 3x3 mm 16 pin QFN package.
Application notes, models, and support documentation are available at
www.onsemi.com.
Features
• Maximum Input Clock Frequency up to 3.5 GHz
• Maximum Input Data Rate up to 5.0 Gb/s
• < 0.7 ps Maximum Clock RMS Jitter
• < 10 ps Maximum Data Dependent Jitter at 2.5 Gb/s
• 220 ps Typical Propagation Delay
• 60 ps Typical Rise and Fall Times
• CML Output with Operating Range:
♦ V_CC = 2.375 V to 3.6 V with V_EE = 0 V
• CML Output Level (400 mV Peak-to-Peak Output),
Differential Output Only
• 50 W Internal Input and Output Termination Resistors
• Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP,
EP, and SG Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
1
QFN−16
MN SUFFIX
CASE 485G−01
MARKING DIAGRAM*
16
1
NB4L
16M
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MB4L16MMNG
MB4L16MMNR2G
Package Shipping^†
QFN−16
(Pb-Free)
123 Units/Tube
QFN−16 3000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
August, 2016 − Rev. 4
Publication Order Number:
NB4L16M/D