NB3L14S Datasheet, PDF (1/8 Pages) ON Semiconductor – 2.5 V 1:4 LVDS Fanout Buffer

NB3L14S
2.5 V 1:4 LVDS Fanout
Buffer
The NB3L14S is a differential 1:4 LVDS Clock fanout buffer. The
differential inputs incorporate internal 50 W termination resistors that
are accessed through the VT pin. The NB3L14S LVDS signals will be
buffered and replicated to identical LVDS copies of the Input
operating up to 300 MHz. As such, the NB3L14S is ideal for Clock
distribution applications that require low skew.
The NB3L14S is offered in a small 3 mm x 3 mm 16−QFN package.
Application notes, models, and support documentation are available at
www.onsemi.com.
Features
• Maximum Input Clock Frequency; 300 MHz
• Low Output−to−Output Skew; 20 ps
• 450 ps Typical Propagation Delay
• 250 ps Typical Rise and Fall Times
• Single Power Supply; V_CC = 2.5 $ 5%
• These are Pb−Free Devices
http://onsemi.com
MARKING
DIAGRAM*
16
1
NB3L
QFN−16
14S
MN SUFFIX
ALYW G
1
CASE 485G
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q0
Q0
V_CC
Q1
IN
VT
IN
50 W
50 W
Q1
Q2
V_CC
Q2
Q3
Q3
Figure 1. Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
November, 2012 − Rev. 0
Publication Order Number:
NB3L14S/D