NB3H83905C Datasheet, PDF (1/15 Pages) ON Semiconductor – 1.8V/2.5V/3.3V Crystal Input to 1 6 LVTTL/LVCMOS Clock Fanout Buffer with OE

NB3H83905C
1.8V/2.5V/3.3V Crystal Input
to 1:6 LVTTL/LVCMOS Clock
Fanout Buffer with OE
Description
The NB3H83905C is a 1.8 V, 2.5 V or 3.3 V V_DD core Crystal input
to 1:6 LVTTL/LVCMOS fanout buffer with outputs powered by
flexible 1.8 V, 2.5 V, or 3.3 V supply V_DDO (with V_DD w V_DDO). The
device accepts a fundamental Parallel Resonant crystal from 3 MHz to
40 MHz or a single−ended LVCMOS Clock from up to 100 MHz.
Two synchronous LVTTL/LVCMOS Enable lines permit
independent control over outputs BCLK[0:4] and output BCLK5;
enabling or disabling only when the output is in LOW state
eliminating potential output glitching or runt pulse generation. When
unused, leave floating open, pins will default to HIGH state.
The 6 outputs drive 50 W series or parallel terminated transmission
lines. Parallel termination should be to 1/2 V_CC. Series terminated
lines can drive 2 loads each, or 12 lines total.
Fit, Form, and Function compatible with ICS83905 and PI6C10806.
Features
• Six Copies of LVTTL/LVCMOS Output Clock
• Supply Operation V_DD w V_DDO:
♦ 1.8 V$0.2 V, 2.5 V $5% or 3.3 V $5% Core V_DD
♦ 1.8 V$0.2 V, 2.5 V $5%, or 3.3 V $5% Output V_DDO
• Crystal Oscillator Interface
• Crystal Input Frequency Range: 3 MHz to 40 MHz
• Clock Input Frequency Range: Up to 100 MHz
• LVCMOS compatible Enable Inputs
• 5 V Tolerant Enable Inputs
• Low Output to Output Skew: 80 ps Max
• Synchronous Output Enable
• Phase Noise Floor −160 dBc (1 MHz)
• Industrial Temperature Range
• These are Pb−Free Devices
XTAL_IN/CLK
C1
XTAL_OUT
C2
ENABLE1
ENABLE2
SYNC
SYNC
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
Figure 1. Simplified Block Diagram
http://onsemi.com
MARKING
DIAGRAMS*
16
SOIC−16
D SUFFIX
CASE 751B
NB3H83905G
ALYYWW
1
16
1
TSSOP−16
DT SUFFIX
CASE 948F
16
NB3H
905C
ALYWG
G
1
1
QFN20
MN SUFFIX
CASE 485BH
20
1 _NB3H
83905
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(*Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
November, 2012 − Rev. 9
Publication Order Number:
NB3H83905C/D