MUN2211T1_07 Datasheet, PDF (1/18 Pages) ON Semiconductor – Bias Resistor Transistors

MUN2211T1 Series
Preferred Devices
Bias Resistor Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SC-59 package which is designed for low power surface
mount applications.
Features
•ăSimplifies Circuit Design
•ăReduces Board Space
•ăReduces Component Count
•ăMoisture Sensitivity Level: 1
•ăESD Rating - Human Body Model: Class 1
- Machine Model: Class B
•ăThe SC-59 Package can be Soldered Using Wave or Reflow
•ăThe Modified Gull-Winged Leads Absorb Thermal Stress During
Soldering Eliminating the Possibility of Damage to the Die
•ăPb-Free Packages are Available
MAXIMUM RATINGS (T_A = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector‐Base Voltage
Collector‐Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
V_CBO
V_CEO
I_C
50
Vdc
50
Vdc
100
mAdc
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T_A = 25°C
Derate above 25°C
P_D
230 (Note 1) mW
338 (Note 2)
1.8 (Note 1) °C/W
2.7 (Note 2)
Thermal Resistance, Junction‐to‐Ambient R_qJA
540 (Note 1) °C/W
370 (Note 2)
Thermal Resistance, Junction‐to‐Lead
R_qJL
264 (Note 1) °C/W
287 (Note 2)
Junction and Storage Temperature
Range
T_J, T_stg -ā55 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR-4 @ Minimum Pad.
2. FR-4 @ 1.0 x 1.0 inch Pad.
©Ă Semiconductor Components Industries, LLC, 2007
1
July, 2007 - Rev. 13
http://onsemi.com
NPN SILICON
BIAS RESISTOR
TRANSISTORS
PIN 2
R₁
BASE
(INPUT)
R₂
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
EMITTER
(GROUND)
3
2
1
SC-59
CASE 318D
STYLE 1
MARKING DIAGRAM
8xĂMĂG
G
1
8x = Device Code (Refer to page 2)
M = Date Code*
G = Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the table on
page 2 of this data sheet.
DEVICE MARKING INFORMATION
See specific marking information in the Device Marking and
Resistor Values table on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MUN2211T1/D