MUN2111T1_06 Datasheet, PDF (1/13 Pages) ON Semiconductor – Bias Resistor Transistors

MUN2111T1 Series
Preferred Devices
Bias Resistor Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The
Bias Resistor Transistor (BRT) contains a single transistor with a
monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. The BRT eliminates these
individual components by integrating them into a single device. The
use of a BRT can reduce both system cost and board space. The device
is housed in the SC−59 package which is designed for low power
surface mount applications.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Moisture Sensitivity Level: 1
• ESD Rating − Human Body Model: Class 1
− Machine Model: Class B
• The SC−59 Package Can be Soldered Using Wave or Reflow
• The Modified Gull−Winged Leads Absorb Thermal Stress During
Soldering Eliminating the Possibility of Damage to the Die
• Pb−Free Packages are Available
MAXIMUM RATINGS (T_A = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector − Base Voltage
Collector − Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
V_CBO
V_CEO
I_C
50
Vdc
50
Vdc
100
mAdc
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T_A = 25°C
Derate above 25°C
P_D
230 (Note 1) mW
338 (Note 2)
1.8 (Note 1) °C/W
2.7 (Note 2)
Thermal Resistance,
Junction−to−Ambient
R_qJA
540 (Note 1) °C/W
370 (Note 2)
Thermal Resistance,
Junction−to−Lead
R_qJL
264 (Note 1) °C/W
287 (Note 2)
Junction and Storage Temperature
Range
T_J, T_stg −55 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 inch Pad.
http://onsemi.com
R1
PIN 2 R2
BASE
(INPUT)
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
EMITTER
(GROUND)
3
2
1
SC−59
CASE 318D
PLASTIC
MARKING DIAGRAM
6x M G
G
1
6x
= Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
DEVICE MARKING INFORMATION
See device marking table on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
1
September, 2006 − Rev. 17
Publication Order Number:
MUN2111T1/D