MTP50P03HDL Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET LOGIC LEVEL 50 AMPERES 30 VOLTS RDS(on) = 0.025 OHM

MTP50P03HDL
Preferred Device
Power MOSFET
50 Amps, 30 Volts, Logic Level
P−Channel TO−220
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Pb−Free Package is Available*
http://onsemi.com
50 AMPERES, 30 VOLTS
R_DS(on) = 25 mW
P−Channel
D
G
S
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value
Drain−Source Voltage
V_DSS
30
Drain−Gate Voltage (R_GS = 1.0 MW)
V_DGR
30
Gate−Source Voltage
− Continuous
− Non−Repetitive (t_p ≤ 10 ms)
V_GS
V_GSM
± 15
± 20
Drain Current − Continuous
Drain Current − Continuous @ 100°C
Drain Current − Single Pulse (t_p ≤ 10 ms)
I_D
50
I_D
31
I_DM
150
Total Power Dissipation
Derate above 25°C
P_D
125
1.0
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
W
W/°C
Operating and Storage Temperature Range T_J, T_stg −55 to
°C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 25 Vdc, V_GS = 5.0 Vdc, Peak
I_L = 50 Apk, L = 1.0 mH, R_G = 25 W)
Thermal Resistance,
Junction−to−Case
Junction−to−Ambient, when mounted with
the minimum recommended pad size
E_AS
1250
mJ
R_qJC
R_qJA
°C/W
1.0
62.5
Maximum Lead Temperature for Soldering
T_L
Purposes, 1/8″ from case for 10 seconds
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
4
TO−220AB
CASE 221A
STYLE 5
M50P03HDLG
AYWW
1
2
3
1
Gate
2
Drain
3
Source
M50P03HDL = Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping
MTP50P03HDL TO−220AB 50 Units/Rail
MTP50P03HDLG TO−220AB
(Pb−Free)
50 Units/Rail
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 6
Publication Order Number:
MTP50P03HDL/D