MTP10N10EL Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 10 AMPERES 100 VOLTS RDS(on) = 0.22 OHMS

MTP10N10EL
Preferred Device
Power MOSFET
10 A, 100 V, Logic Level, N−Channel TO−220
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Pb−Free Package is Available
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (R_GS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (t_p ≤ 10 ms)
Drain Current
− Continuous @ T_C = 25°C
− Continuous @ T_C = 100°C
− Single Pulse (t_p ≤ 10 ms)
Total Power Dissipation @ T_C = 25°C
Derate above 25°C
Total Power Dissipation @ T_C = 25°C
(Note 1)
V_DSS
V_DGR
V_GS
V_GSM
I_D
I_D
I_DM
P_D
100
Vdc
100
Vdc
± 15
Vdc
± 20
Vpk
10
Adc
6.0
35
Apk
40
Watts
0.32 W/°C
1.75 Watts
Operating and Storage Temperature
Range
T_J, T_stg − 55 to
°C
150
Single Pulse Drain−to−Source Avalanche
E_AS
mJ
Energy − Starting T_J = 25°C
50
(V_DD = 25 Vdc, V_GS = 5.0 Vdc, Peak
I_L = 10 Adc, L = 1.0 mH, R_G = 25 W)
Thermal Resistance
− Junction−to−Case°
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
R_qJC
R_qJA
R_qJA
°C/W
3.13
100
71.4
Maximum Lead Temperature for Soldering
T_L
Purposes, 1/8″ from case for 10 secs
260
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
http://onsemi.com
10 A, 100 V
R_DS(on) = 0.22 W
N−Channel
D
G
S
MARKING DIAGRAM
& PIN ASSIGNMENT
4
4
Drain
1
2
3
TO−220AB
CASE 221A
STYLE 5
MTP10N10EL
LLYWW
1
Gate
3
Source
2
Drain
MTP10N10EL
LL
Y
WW
= Device Code
= Location Code
= Year
= Work Week
ORDERING INFORMATION
Device
MTP10N10EL
Package
TO−220AB
Shipping
50 Units/Rail
MTP10N10ELG TO−220AB
(Pb−Free)
50 Units/Rail
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 4
Publication Order Number:
MTP10N10EL/D