MTD6N20E Datasheet, PDF (1/9 Pages) Motorola, Inc – TMOS POWER FET 6.0 AMPERES 200 VOLTS RDS(on) = 0.7 OHM

MTD6N20E
Preferred Device
Power MOSFET
6 Amps, 200 Volts
N−Channel DPAK
This advanced Power MOSFET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain−to−source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor controls,
these devices are particularly well suited for bridge circuits where
diode speed and commutating safe operating areas are critical and
offer additional safety margin against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Pb−Free Package is Available*
http://onsemi.com
6 AMPERES, 200 VOLTS
R_DS(on) = 460 mW
N−Channel
D
G
S
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value Unit
MARKING
DIAGRAMS
Drain−to−Source Voltage
V_DSS
200
Vdc
4 Drain
Drain−to−Gate Voltage (R_GS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−repetitive (t_p ≤ 10 ms)
Drain Current
− Continuous
− Continuous @ 100°C
− Single Pulse (t_p ≤ 10 ms)
V_DGR
200
Vdc
V_GS
± 20 Vdc
V_GSM
± 40
Vpk
I_D
6.0
Adc
I_D
3.8
I_DM
18
Apk
12
3
4
DPAK
CASE 369C
STYLE 2
12 3
Gate ^Drain Source
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T_A = 25°C (Note 2)
Operating and Storage Temperature Range
P_D
T_J, T_stg
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 80 Vdc, V_GS = 10 Vdc,
I_L = 6.0 Apk, L = 3.0 mH, R_G = 25 W)
Thermal Resistance − Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Temperature for Soldering
Purposes, 1/8″ from case for 10 secs
E_AS
R_qJC
R_qJA
R_qJA
T_L
50
0.4
1.75
−55 to
150
54
2.50
100
71.4
260
W
W/°C
W
°C
mJ
°C/W
°C
4
1
2
3
DPAK
CASE 369D
STYLE 2
4 Drain
123
6N20E Device Code
Gate Drain Source
Y
= Year
WW = Work Week
G
= Pb−Free Package
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using the 0.5 sq. in. drain pad size.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
August, 2005 − Rev. 3
Publication Order Number:
MTD6N20E/D