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MTD6N15 Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 6.0 AMPERES 150 VOLTS RDS(on) = 0.3 OHM
MTD6N15
Power Field Effect
Transistor DPAK
for Surface Mount
N−Channel Enhancement−Mode Silicon
Gate
This TMOS Power FET is designed for high speed, low loss power
switching applications such as switching regulators, converters,
solenoid and relay drivers.
• Silicon Gate for Fast Switching Speeds
• Low RDS(on) — 0.3 Ω Max
• Rugged — SOA is Power Dissipation Limited
• Source−to−Drain Diode Characterized for Use With
Inductive Loads
• Low Drive Requirement — VGS(th) = 4.0 V Max
• Surface Mount Package on 16 mm Tape
MAXIMUM RATINGS
Rating
Symbol Value Unit
Drain−Source Voltage
Drain−Gate Voltage (RGS = 1.0 MΩ)
Gate−Source Voltage — Continuous
Gate−Source Voltage — Non−Repetitive
(tp ≤ 50 µs)
Drain Current — Continuous
Drain Current — Pulsed
VDSS
VDGR
VGS
VGSM
ID
IDM
150
Vdc
150
Vdc
± 20
Vdc
± 40
Vpk
6.0
Adc
20
Total Power Dissipation @ TC = 25°C
Derate above 25°C
PD
20
Watts
0.16
W/°C
Total Power Dissipation @ TA = 25°C
Derate above 25°C (Note 1)
PD
1.25
Watts
0.01
W/°C
Total Power Dissipation @ TA = 25°C (1)
PD
Derate above 25°C (Note 2)
1.75
0.014
Watts
W/°C
Operating and Storage Junction Temper- TJ, Tstg
−65 to
°C
ature Range
+150
THERMAL CHARACTERISTICS
Characteristic
Symbol Value Unit
Thermal Resistance
− Junction to Case
− Junction to Ambient (Note 1)
− Junction to Ambient (Note 2)
RθJC
RθJA
RθJA
6.25
°C/W
100
71.4
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.
http://onsemi.com
V(BR)DSS
150 V
RDS(on) MAX
0.3 W
ID MAX
6.0 A
N−CHANNEL
D
G
S
4
4
12
3
1
2
3
CASE 369C
DPAK
(Surface Mount)
STYLE 2
CASE 369D
DPAK
(Straight Lead)
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENTS
4 Drain
4 Drain
1
Gate
6N15
Y
WW
3
2 Source
Drain
1
Gate
= Device Code
= Year
= Work Week
2
Drain
3
Source
ORDERING INFORMATION
Device
Package
Shipping†
MTD6N15
MTD6N15−1
DPAK
DPAK
Straight Lead
75 Units/Rail
75 Units/Rail
MTD6N15T4
DPAK
2500 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
1
March, 2004 − Rev. 2
Publication Order Number:
MTD6N15/D