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MTD10N10EL Datasheet, PDF (1/8 Pages) ON Semiconductor – TMOS E-FET Power Field Effect Transistor DPAK for Surface Mount
MTD10N10EL
TMOS E−FET™
Power Field Effect Transistor
DPAK for Surface Mount
N−Channel Enhancement−Mode Silicon
Gate
http://onsemi.com
This advanced TMOS E−FET is designed to withstand high energy
in the avalanche and commutation modes. The new energy efficient
design also offers a drain−to−source diode with a fast recovery time.
Designed for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients.
VDSS
100 V
RDS(ON) TYP
0.22 Ω
ID MAX
10 A
N−Channel
D
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Surface Mount Package Available in 16 mm, 13−inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
G
S
MARKING DIAGRAM
& PIN ASSIGNMENTS
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Parameter
Symbol Value
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MΩ)
Gate−to−Source Voltage — Continuous
— Non−Repetitive (tp ≤ 10 ms)
VDSS
100
VDGR
100
VGS
±15
VGSM
±20
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
ID
10
ID
6.0
IDM
35
Total Power Dissipation @ TC = 25°C
PD
40
Derate above 25°C
0.32
Total Power Dissipation @ TA = 25°C (Note 2)
1.75
Operating and Storage Temperature Range
TJ, Tstg − 55 to
150
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
4
4
Drain
12
3
DPAK
CASE 369C
(Surface Mount)
Style 2
2
1 Drain 3
Gate
Source
10N10EL=Device Code
Y
= Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping†
Single Pulse Drain−to−Source Avalanche
Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 10 Apk,
L = 1.0 mH, RG =25 Ω)
Thermal Resistance — Junction to Case
— Junction to Ambient (Note 1)
— Junction to Ambient (Note 2)
Maximum Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
EAS
RθJC
RθJA
RθJA
TL
mJ
50
3.13 °C/W
100
71.4
260
°C
MTD10N10EL
MTD10N10ELT4
DPAK
DPAK
75 Units/Rail
2500 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1. When surface mounted to an FR4 board using minimum recommended pad size.
2. When surface mounted to an FR4 board using 0.5 sq in pad size.
© Semiconductor Components Industries, LLC, 2004
1
March, 2004 − Rev. 1
Publication Order Number:
MTD10N10EL/D