MTB75N03HDL Datasheet, PDF (1/12 Pages) Motorola, Inc – TMOS POWER FET LOGIC LEVEL 75 AMPERES 25 VOLTS

MTB75N03HDL
Preferred Device
Power MOSFET
75 Amps, 25 Volts, Logic Level
N−Channel D²PAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Short Heatsink Tab Manufactured − Not sheared
• Specially Designed Leadframe for Maximum Power Dissipation
http://onsemi.com
75 AMPERES
25 VOLTS
R_DS(on) = 9 mΩ
N−Channel
D
G
S
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value
Drain−to−Source Voltage
Drain−to−Gate Voltage (R_GS = 1.0 MΩ)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (t_p ≤ 10 ms)
Drain Current − Continuous
Drain Current − Continuous @ 100°C
Drain Current − Single Pulse (t_p ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T_A = 25°C
(Note 1.)
V_DSS
V_DGR
V_GS
V_GSM
I_D
I_D
I_DM
P_D
25
25
± 15
± 20
75
59
225
125
1.0
2.5
Operating and Storage Temperature
Range
− 55 to 150
Single Pulse Drain−to−Source Avalanche
E_AS
280
Energy − Starting T_J = 25°C
(V_DD = 25 Vdc, V_GS = 5.0 Vdc,
I_L = 75 Apk, L = 0.1 mH, R_G = 25 Ω)
Thermal Resistance
− Junction to Case
− Junction to Ambient
− Junction to Ambient (Note 1.)
R_θJC
R_θJA
R_θJA
1.0
62.5
50
Maximum Lead Temperature for Soldering
T_L
260
Purposes, 1/8″ from case for 10
seconds
1. When mounted with the minimum recommended pad size.
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
12
3
4
D²PAK
CASE 418B
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
T75N03HDL
YWW
12
Gate Drain
3
Source
T75N03HDL
Y
WW
= Device Code
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
MTB75N03HDL
MTB75N03HDLT4
D²PAK
D²PAK
50 Units/Rail
800/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2000
1
September, 2004 − Rev. XXX
Publication Order Number:
MTB75N03HDL/D