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MTB2P50E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 2.0 AMPERES 500 VOLTS
MTB2P50E
Preferred Device
Power MOSFET
2 Amps, 500 Volts
P−Channel D2PAK
This high voltage MOSFET uses an advanced termination scheme
to provide enhanced voltage−blocking capability without degrading
performance over time. In addition, this Power MOSFET is designed
to withstand high energy in the avalanche and commutation modes.
The energy efficient design also offers a drain−to−source diode with a
fast recovery time. Designed for high voltage, high speed switching
applications in power supplies, converters and PWM motor controls,
these devices are particularly well suited for bridge circuits where
diode speed and commutating safe operating areas are critical and
offer additional safety margin against unexpected voltage transients.
Features
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Short Heatsink Tab Manufactured — Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
• Pb−Free Package is Available
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−Source Voltage
Drain−Gate Voltage (RGS = 1.0 MW)
Gate−Source Voltage − Continuous
Non−Repetitive (tp ≤ 10 ms)
Drain Current − Continuous
Drain Current − Continuous @ 100°C
Drain Current − Single Pulse (tp ≤ 10 ms)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
500 Vdc
500 Vdc
± 20 Vdc
± 40 Vpk
2.0 Adc
1.6
6.0 Apk
75 W
0.6 W/°C
2.5
−55 to °C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc,
IL = 4.0 Apk, L = 10 mH, RG = 25 W)
EAS
80 mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 sec
RqJC
RqJA
RqJA
TL
°C/W
1.67
62.5
50
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 4
http://onsemi.com
2 AMPERES, 500 VOLTS
RDS(on) = 6 W
P−Channel
D
G
S
D2PAK
CASE 418B
STYLE 2
1
MARKING DIAGRAM & PIN ASSIGNMENT
4
Drain
T
2
P50EG
AYWW
1
Gate
2
Drain
3
Source
T2P50E = Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
Device
MTB2P50ET4
MTB2P50ET4G
Package
D2PAK
D2PAK
(Pb−Free)
Shipping†
800/Tape & Reel
800/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MTB2P50E/D