MJD128T4G_12 Datasheet, PDF (1/6 Pages) ON Semiconductor – Complementary Darlington Power Transistor

MJD128T4G,
NJVMJD128T4G (PNP)
Complementary Darlington
Power Transistor
DPAK For Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
Features
 Monolithic Construction With Built−in Base−Emitter Shunt Resistors
 High DC Current Gain: h_FE = 2500 (Typ) @ I_C = 4.0 Adc
 Epoxy Meets UL 94 V−0 @ 0.125 in.
 ESD Ratings:
 Human Body Model, 3B > 8000 V
 Machine Model, C > 400 V
 NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
 These are Pb−Free Devices*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS}
Rating
Symbol Value
Unit
Collector−Emitter Voltage
V_CEO
120
Vdc
Collector−Base Voltage
V_CB
120
Vdc
Emitter−Base Voltage
V_EB
5
Vdc
Collector Current
Continuous
Peak
I_C
Adc
8
16
Base Current
Total Power Dissipation
@ T_C = 25C
Derate above 25C
I_B
120
mAdc
P_D
W
20
W/C
0.16
Total Power Dissipation*
@ T_A = 25C
Derate above 25C
P_D
W
1.75
W/C
0.014
Operating and Storage Junction
Temperature Range
T_J, T_stg − 65 to
C
+ 150
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{THERMAL CHARACTERISTICS}
Characteristic
Symbol Max
Unit
Thermal Resistance, Junction−to−Case
Thermal Resistance,
Junction−to−Ambient (Note 1)
R_qJC
R_qJA
6.25
C/W
C/W
71.4
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
SILICON
POWER TRANSISTOR
8 AMPERES
120 VOLTS, 20 WATTS
DPAK
CASE 369C
STYLE 1
MARKING DIAGRAM
Base 1
Collector 2
AYWW
J128G
4
Emitter 3
A = Assembly Location
Y = Year
WW = Work Week
J128 = Device Code
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping^†
MJD128T4G
NJVMJD128T4G
DPAK
(Pb−Free)
DPAK
(Pb−Free)
2,500/Tape & Reel
2,500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2012
1
February, 2012 − Rev. 5
Publication Order Number:
MJD128/D