English
Language : 

MCR72_05 Datasheet, PDF (1/6 Pages) ON Semiconductor – Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors
MCR72−3, MCR72−6,
MCR72−8
Preferred Device
Sensitive Gate Silicon
Controlled Rectifiers
Reverse Blocking Thyristors
Designed for industrial and consumer applications such as
temperature, light and speed control; process and remote controls;
warning systems; capacitive discharge circuits and MPU interface.
Features
• Center Gate Geometry for Uniform Current Density
• All Diffused and Glass-Passivated Junctions for Parameter
Uniformity and Stability
• Small, Rugged Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
• Low Trigger Currents, 200 mA Maximum for Direct Driving from
Integrated Circuits
• Pb−Free Packages are Available*
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Peak Repetitive Off−State Voltage (Note 1) VDRM,
V
(TJ = *40 to 110°C, Sine Wave,
VRRM
50 to 60 Hz, Gate Open)
MCR72−3
100
MCR72−6
400
MCR72−8
600
On-State RMS Current
(180° Conduction Angles; TC = 83°C)
IT(RMS)
8.0
A
Peak Non-Repetitive Surge Current
(1/2 Cycle, 60 Hz, TJ = 110°C)
ITSM
100
A
Circuit Fusing Considerations (t = 8.3 ms)
I2t
40
A2s
Forward Peak Gate Voltage
(t ≤ 10 ms, TC = 83°C)
VGM
"5.0
V
Forward Peak Gate Current
(t ≤ 10 ms, TC = 83°C)
IGM
1.0
A
Forward Peak Gate Power
(t ≤ 10 ms, TC = 83°C)
PGM
5.0
W
Average Gate Power (t = 8.3 ms, TC = 83°C) PG(AV)
0.75
W
Operating Junction Temperature Range
TJ
−40 to +110 °C
Storage Temperature Range
Tstg −40 to +150 °C
Mounting Torque
−
8.0
in. lb.
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings
apply for zero or negative gate voltage; however, positive gate voltage shall
not be applied concurrent with negative potential on the anode. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 20005
1
December, 2005 − Rev. 3
http://onsemi.com
SCRs
8 AMPERES RMS
100 thru 600 VOLTS
G
A
K
123
TO−220AB
CASE 221A−07
STYLE 3
TO−220AB
CASE 221A−09
STYLE 3
1
23
PIN ASSIGNMENT
1
Cathode
2
Anode
3
Gate
4
Anode
MARKING AND ORDERING INFORMATION
See detailed marking, ordering, and shipping information in
the package dimensions section on page 4 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MCR72/D