MC74VHCT126A_11 Datasheet, PDF (1/7 Pages) ON Semiconductor – Quad Bus Buffer with 3−State Control Inputs

MC74VHCT126A
Quad Bus Buffer
with 3−State Control Inputs
The MC74VHCT126A is a high speed CMOS quad bus buffer
fabricated with silicon gate CMOS technology. It achieves
noninverting high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
The MC74VHCT126A requires the 3−state control input (OE) to be
set Low to place the output into high impedance.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
The VHCT126A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V_CC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t_PD = 3.8 ns (Typ) at V_CC = 5.0 V
• Low Power Dissipation: I_CC = 4.0 mA (Max) at T_A = 25°C
• TTL−Compatible Inputs: V_IL = 0.8 V; V_IH = 2.0 V
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V_OLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
VHCT126AG
1
D SUFFIX
CASE 751A
AWLYWW
1
14
TSSOP−14
VHCT
1
DT SUFFIX
CASE 948G
126A
ALYWG
G
1
14
1
SOEIAJ−14
M SUFFIX
CASE 965
VHCT126
ALYWG
1
A
= Assembly Location
WL, L = Wafer Lot
Y
= Year
WW, W = Work Week
G or G = Pb−Free Package
See Applications Note #AND8004/D for
date code and traceability information.
FUNCTION TABLE
VHCT126A
Inputs
A
OE
Outputs
Y
H
H
H
L
H
L
X
L
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 − Rev. 7
Publication Order Number:
MC74VHCT126A/D