MC74VHC74_11 Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual D-Type Flip-Flop

MC74VHC74
Dual D-Type Flip-Flop
with Set and Reset
The MC74VHC74 is an advanced high speed CMOS D−type
flip−flop fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The signal level applied to the D input is transferred to Q output
during the positive going transition of the Clock pulse.
Reset (RD) and Set (SD) are independent of the Clock (CP) and are
accomplished by setting the appropriate input Low.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: f_max = 170MHz (Typ) at V_CC = 5V
• Low Power Dissipation: I_CC = 2mA (Max) at T_A = 25°C
• High Noise Immunity: V_NIH = V_NIL = 28% V_CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V_OLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• Chip Complexity: 128 FETs or 32 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
14
1
1
1
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
VHC74G
AWLYWW
TSSOP−14
DT SUFFIX
CASE 948G
14
VHC
74
ALYWG
G
1
14
SOEIAJ−14
M SUFFIX
CASE 965
1
VHC74
ALYWG
A
= Assembly Location
WL, L = Wafer Lot
Y, YY = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
RD1 ¹
D1 ²
3
CP1
SD1 ⁴
5
Q1
6
Q1
13
RD2
D2 ¹²
11
CP2
10
SD2
Figure 1. LOGIC DIAGRAM
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 8
9
Q2
8
Q2
1
FUNCTION TABLE
Inputs
Outputs
SD RD CP D Q Q
LH
HL
LL
HH
HH
HH
HH
HH
XX
HL
XX
LH
X X H* H*
H HL
L
LH
L X No Change
H X No Change
X No Change
*Both outputs will remain high as long as Set and Re-
set are low, but the output states are unpredictable
if Set and Reset go high simultaneously.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
MC74VHC74/D