MC74VHC373_14 Datasheet, PDF (1/7 Pages) ON Semiconductor – Octal D-Type Latch with 3-State Output

MC74VHC373
Octal D-Type Latch
with 3-State Output
The MC74VHC373 is an advanced high speed CMOS octal latch
with 3−state output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
This 8−bit D−type latch is controlled by a latch enable input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t_PD = 5.0 ns (Typ) at V_CC = 5.0 V
• Low Power Dissipation: I_CC = 4.0 mA (Max) at T_A = 25°C
• High Noise Immunity: V_NIH = V_NIL = 28% V_CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 5.5 V Operating Range
• Low Noise: V_OLP = 0.9 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 186 FETs or 46.5 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAM
20
20
1
SOIC−20
DW SUFFIX
CASE 751D
1
VHC373
AWLYYWWG
VHC373
A
WL, L
Y
WW, W
G or G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
OE ¹
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 V_CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 _LE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 8
Publication Order Number:
MC74VHC373/D