MC74VHC1GT14_15 Datasheet, PDF (1/6 Pages) ON Semiconductor – Schmitt-Trigger Inverter / CMOS Logic Level Shifter

MC74VHC1GT14
Schmitt-Trigger Inverter /
CMOS Logic Level Shifter
LSTTL−Compatible Inputs
The MC74VHC1GT14 is a single gate CMOS Schmitt−trigger
inverter fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic−level translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the high−voltage power supply.
The MC74VHC1GT14 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT14 to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when V_CC = 0 V.
These input and output structures help prevent device destruction
caused by supply voltage − input/output voltage mismatch, battery
backup, hot insertion, etc. The MC74VHC1GT14 can be used to
enhance noise immunity or to square up slowly changing waveforms.
Features
• High Speed: t_PD = 4.5 ns (Typ) at V_CC = 5 V
• Low Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
• TTL−Compatible Inputs: V_IL = 0.8 V; V_IH = 2 V
• CMOS−Compatible Outputs: V_OH > 0.8 V_CC; V_OL < 0.1 V_CC @Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 100; Equivalent Gates = 25
• These Devices are Pb−Free and are RoHS Compliant
NC 1
5 V_CC
IN A 2
GND 3
4 _{OUT Y}
Figure 1. Pinout (Top View)
www.onsemi.com
MARKING
DIAGRAMS
5
SC−88A / SC70−5 / SOT−353
DF SUFFIX
VC M G
G
CASE 419A
1
5
1
TSOP−5 / SOT23−5 / SC59−5
DT SUFFIX
CASE 483
5
VC M G
G
1
VC = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1
NC
2
IN A
3
GND
4
OUT Y
5
V_CC
FUNCTION TABLE
A Input
Y Output
L
H
H
L
IN A
1
OUT Y
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2015
1
March, 2015 − Rev. 14
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
MC74VHC1GT14/D