MC74LVX50_11 Datasheet, PDF (1/11 Pages) ON Semiconductor – Hex Buffer

MC74LVX50
Hex Buffer
The MC74LVX50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t_PD = 4.1 ns (Typ) at V_CC = 3.3 V
• Low Power Dissipation: I_CC = 2 mA (Max) at T_A = 25°C
• High Noise Immunity: V_NIH = V_NIL = 28% V_CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 3.6 V Operating Range
• Low Noise: V_OLP = 0.5 V (Max)
• These Devices are Pb−Free and are RoHS Compliant
14
1
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
LVX50G
AWLYWW
14
1
14
TSSOP−14
DT SUFFIX
CASE 948G
LVX
50
ALYWG
G
1
14
14
1
SOEIAJ−14
M SUFFIX
CASE 965
LVX50
ALYWG
1
LVX50
A
WL, L
Y
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 − Rev. 4
Publication Order Number:
MC74LVX50/D