MC74LVX244_14 Datasheet, PDF (1/6 Pages) ON Semiconductor – Octal Bus Buffer

MC74LVX244
Octal Bus Buffer
With 5V−Tolerant Inputs
The MC74LVX244 is an advanced high speed CMOS
non−inverting 3−state octal bus buffer and has two active low output
enables. It is also designed to work with 3−state memory address
drivers, etc. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
Features
• High Speed: t_PD = 4.7 ns (Typ) at V_CC = 3.3 V
• Low Power Dissipation: I_CC = 4 mA (Max) at T_A = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: V_OLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• These Devices are Pb−Free and are RoHS Compliant
1
1OE
2
1D0
4
1D1
6
1D2
8
1D3
19
2OE
18
1O0
17
2D0
16
1O1
15
2D1
14
1O2
13
2D2
12
1O3
11
2D3
Figure 1. Logic Diagram
3
2O0
5
2O1
7
2O2
9
2O3
PIN NAMES
Pins
Function
nOE
1Dn, 2Dn
1On, 2On
Output Enable Inputs
Data Inputs
3−State Outputs
FUNCTION TABLE
INPUTS
1OE, 2OE 1Dn, 2Dn
L
L
L
H
H
X
OUTPUTS
1On, 2On
L
H
Z
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 4
http://onsemi.com
SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
PIN ASSIGNMENT
V_CC 2OE 1O0 2D0 1O1 2D1 1O2 2D2 1O3 2D3
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
1OE 1D0 2O0 1D1 2O1 1D2 2O2 1D3 2O3 GND
20−Lead (Top View)
MARKING DIAGRAMS
20
LVX244
AWLYYWWG
1
SOIC−20
20
LVX
244
ALYWG
G
1
TSSOP−20
LVX244
A
WL, L
Y
WW, W
G or G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
MC74LVX244/D