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MC74LVX139 Datasheet, PDF (1/12 Pages) ON Semiconductor – Dual 2-to-4 Decoder/ Demultiplexer
MC74LVX139
Dual 2-to-4 Decoder/
Demultiplexer
The MC74LVX139 is an advanced high speed CMOS 2–to–4
decoder/ demultiplexer fabricated with silicon gate CMOS technology.
When the device is enabled (E = low), it can be used for gating or as
a data input for demultiplexing operations. When the enable input is
held high, all four outputs are fixed high, independent of other inputs.
The inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
• High Speed: tPD = 6.0 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 4 µΑ (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2 V to 3.6 V Operating Range
• Low Noise: VOLP = 0.5 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 100 FETs or 25 Equivalent Gates
Ea 1
A0a 2
A1a 3
Y0a 4
Y1a 5
Y2a 6
Y3a 7
GND 8
16 VCC
15 Eb
14 A0b
13 A1b
12 Y0b
11 Y1b
10 Y2b
9 Y3b
Figure 1. Pin Assignment
FUNCTION TABLE
Inputs
E A1 A0
H
XX
L
LL
L
LH
L
HL
L
HH
Outputs
Y0 Y1 Y2 Y3
H HH H
L HH H
H LH H
H HL H
H HH L
http://onsemi.com
SOIC–16
D SUFFIX
CASE 751B
MARKING DIAGRAMS
16
9
LVX139
AWLYYWW
1
8
16
9
TSSOP–16
DT SUFFIX
CASE 948F
SOIC EIAJ–16
M SUFFIX
CASE 966
LVX139
AWLYWW
1
8
16
9
LVX139
ALYW
1
8
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC74LVX139D
SO–16 48 Units/Rail
MC74LVX139DR2
SO–16 2500 Units/Reel
MC74LVX139DT TSSOP–16 96 Units/Rail
MC74LVX139DTR2 TSSOP–16 2000 Units/Reel
MC74LVX139M
SO EIAJ–16 48 Units/Rail
MC74LVX139MEL SO EIAJ–16 2000 Units/Reel
© Semiconductor Components Industries, LLC, 2001
1
April, 2001 – Rev. 1
Publication Order Number:
MC74LVX139/D