MC74LCX74 Datasheet, PDF (1/9 Pages) Motorola, Inc – LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS
Dual D-Type Flip-Flop
With 5V-Tolerant Inputs
The MC74LCX74 is a high performance, dual D–type flip–flop with
asynchronous clear and set inputs and complementary (O, O) outputs. It
operates from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX74 inputs to be safely driven from
5V devices.
The MC74LCX74 consists of 2 edge–triggered flip–flops with
individual D–type inputs. The flip–flop will store the state of individual D
inputs, that meet the setup and hold time requirements, on the
LOW–to–HIGH Clock (CP) transition.
• Designed for 2.7 to 3.6V VCC Operation
• 5V Tolerant Inputs — Interface Capability With 5V TTL Logic
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
MC74LCX74
LOW–VOLTAGE CMOS
DUAL D–TYPE FLIP–FLOP
14
1
14
1
14
1
D SUFFIX
PLASTIC SOIC
CASE 751A–03
M SUFFIX
PLASTIC SOIC EIAJ
CASE 965–01
SD SUFFIX
PLASTIC SSOP
CASE 940A–03
Pinout: 14–Lead (Top View)
VCC CD2 D2 CP2 SD2 O2 O2
14 13 12 11 10 9 8
14
1
DT SUFFIX
PLASTIC TSSOP
CASE 948G–01
1234567
CD1 D1 CP1 SD1 O1 O1 GND
PIN NAMES
Pins
Function
CP1, CP2
D1, D2
CD1, CD2
SD1, SD2
On, On
Clock Pulse Inputs
Data Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
11/96
© Motorola, Inc. 1996
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