MC74HCT74A_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – Dual D Flip−Flop with Set and Reset with LSTTL Compatible Inputs

MC74HCT74A
Dual D Flip−Flop with Set
and Reset with LSTTL
Compatible Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT74A is identical in pinout to the LS74. This device
may be used as a level converter for interfacing TTL or NMOS outputs
to High Speed CMOS inputs.
This device consists of two D flip−flops with individual Set, Reset,
and Clock inputs. Information at a D−input is transferred to the
corresponding Q output on the next positive going edge of the clock
input. Both Q and Q outputs are available from each flip−flop. The Set
and Reset inputs are asynchronous.
Features
• Output Drive Capability: 10 LSTTL Loads
• TTL NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 mA
• In Compliance With the JEDEC Standard No. 7.0 A Requirements
• Chip Complexity: 136 FETs or 34 Equivalent Gates
• Pb−Free Packages are Available
LOGIC DIAGRAM
RESET 1 ¹
DATA 1 ²
3
CLOCK 1
5
Q1
6
Q1
SET 1 ⁴
13
RESET 2
PIN 14 = V_CC
PIN 7 = GND
DATA 2 ¹²
11
CLOCK 2
9
Q2
8
Q2
10
SET 2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Countâ€} 
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Power Dissipation}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Speed Power Product}
Value
34
1.5
5.0
.0075
Units
ea.
ns
mW
pJ
†Equivalent to a two−input NAND gate.
© Semiconductor Components Industries, LLC, 2006
1
October, 2006 − Rev. 10
http://onsemi.com
14
1
MARKING
DIAGRAMS
14
PDIP−14
N SUFFIX
CASE 646
1
MC74HCT74AN
AWLYYWWG
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
HCT74AG
AWLYWW
A
= Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G
= Pb−Free Package
PIN ASSIGNMENT
RESET 1 1
DATA 1 2
CLOCK 1 3
SET 1 4
Q1 5
Q1 6
GND 7
14 V_CC
13 RESET 2
12 DATA 2
11 CLOCK 2
10 SET 2
9 Q2
8 Q2
FUNCTION TABLE
Inputs
Set Reset Clock Data
LH
HL
LL
HH
HH
HH
HH
HH
XX
XX
XX
H
L
LX
HX
X
Outputs
QQ
HL
LH
H* H*
HL
LH
No Change
No Change
No Change
*Both outputs will remain high as long as Set and
Reset are low, but the output states are unpredict-
able if Set and Reset go high simultaneously.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Publication Order Number:
MC74HCT74A/D