MC74HCT273A_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – Octal D Flip−Flop with Common Clock and Reset with LSTTL−Compatible Inputs

MC74HCT273A
Octal D Flip−Flop with
Common Clock and Reset
with LSTTL−Compatible
Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT273A may be used as a level converter for
interfacing TTL or NMOS outputs to High−Speed CMOS inputs.
The HCT273A is identical in pinout to the LS273.
This device consists of eight D flip−flops with common Clock and
Reset inputs. Each flip−flop is loaded with a low−to−high transition of
the Clock input. Reset is asynchronous and active low.
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 μA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 284 FETs or 71 Equivalent Gates
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
http://onsemi.com
20
1
20
1
PDIP−20
N SUFFIX
CASE 738
MARKING
DIAGRAMS
20
MC74HCT273AN
AWLYYWW
SOIC WIDE−20
DW SUFFIX
CASE 751D
1
20
HCT273A
AWLYYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN ASSIGNMENT
RESET 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 V_CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CLOCK
ORDERING INFORMATION
Device
Package Shipping
MC74HCT273AN
PDIP−20 1440 / Box
MC74HCT273ADW SOIC−WIDE 38 / Rail
MC74HCT273ADWR2 SOIC−WIDE 1000 / Reel
© Semiconductor Components Industries, LLC, 2006
1
March, 2006 − Rev. 10
Publication Order Number:
MC74HCT273A/D