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MC74HCT244A_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – Octal 3−State Noninverting Buffer/Line Driver/Line Receiver with LSTTL−Compatible Inputs
MC74HCT244A
Octal 3−State Noninverting
Buffer/Line Driver/
Line Receiver with
LSTTL−Compatible Inputs
High−Performance Silicon−Gate CMOS
http://onsemi.com
The MC74HCT244A is identical in pinout to the LS244. This
device may be used as a level converter for interfacing TTL or NMOS
outputs to High−Speed CMOS inputs. The HCT244A is an octal
noninverting buffer line driver line receiver designed to be used with
3−state memory address drivers, clock drivers, and other bus−oriented
systems. The device has non−inverted outputs and two active−low
output enables.
The HCT244A is the non−inverting version of the HCT240. See
also HCT241.
Features
• Output Drive Capability: 15 LSTTL Loads
• TTL NMOS−Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1 mA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 112 FETs or 28 Equivalent Gates
• Pb−Free Packages are Available
A1 2
A2 4
A3 6
A4 8
DATA INPUTS
B1 11
B2 13
B3 15
B4 17
18 YA1
16 YA2
14 YA3
12 YA4 NONINVERTING
9 YB1 OUTPUTS
7 YB2
5 YB3
3 YB4
OUTPUT ENABLE A 1
ENABLES ENABLE B 19
PIN 20 = VCC
PIN 10 = GND
Figure 1. Logic Diagram
1
1
PDIP−20
N SUFFIX
CASE 738
SOIC−20W
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
1
SOEIAJ−20
M SUFFIX
CASE 967
1
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
20 VCC
19 ENABLE B
18 YA1
A2 4
17 B4
YB3 5
A3 6
YB2 7
16 YA2
15 B3
14 YA3
A4 8
13 B2
YB1 9
GND 10
12 YA4
11 B1
FUNCTION TABLE
Inputs
Outputs
Enable A,
Enable B A, B YA, YB
L
L
L
L
H
H
H
X
Z
Z = high impedance, X = don’t care
ORDERING AND MARKING INFORMATION
See detailed ordering, shipping, and marking information in
the package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 11
Publication Order Number:
MC74HCT244A/D