MC74AC299 Datasheet, PDF (1/11 Pages) ON Semiconductor – 8−Input Universal Shift/Storage Register with Common Parallel I/O Pins

MC74AC299, MC74ACT299
8−Input Universal Shift/
Storage Register with
Common Parallel I/O Pins
The MC74AC299/74ACT299 is an 8−bit universal shift/storage
register with 3−state outputs. Four modes of operation are possible:
hold (store), shift left, shift right and load data. The parallel load inputs
and flip−flop outputs are multiplexed to reduce the total number of
package pins. Additional outputs are provided for flip−flops Q₀, Q₇ to
allow easy serial cascading. A separate active LOW Master Reset is
used to reset the register.
• Common Parallel I/O for Reduced Pin Count
• Additional Serial Inputs and Outputs for Expansion
• Four Operating Modes: Shift Left, Shift Right, Load and Store
• 3−State Outputs for Bus−Oriented Applications
• Outputs Source/Sink 24 mA
• ′ACT299 Has TTL Compatible Inputs
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
V_CC S₁ DS₇ Q₇ I/O₇ I/O₅ I/O₃ I/O₁ CP DS₀
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
S₀ OE₁ OE₂ I/O₆ I/O₄ I/O₂ I/O₀ Q₀ MR GND
Figure 1. Pinout: 20−Lead Packages Conductors
(Top View)
http://onsemi.com
20
1
20
1
PDIP−20
N SUFFIX
CASE 738
SO−20
DW SUFFIX
CASE 751
ORDERING INFORMATION
Device
Package
Shipping
MC74AC299N
PDIP−20 18 Units/Rail
MC74ACT299N
PDIP−20 18 Units/Rail
MC74AC299DW
SOIC−20 38 Units/Rail
MC74AC299DWR2 SOIC−20 1000 Tape & Reel
MC74ACT299DW SOIC−20 38 Units/Rail
MC74ACT299DWR2 SOIC−20 1000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 9 of this data sheet.
PIN ASSIGNMENT
PIN
FUNCTION
CP
Clock Pulse Input
DS₀
DS₇
S₀, S₁
MR
Serial Data Input for Right Shift
Serial Data Input for Left Shift
Mode Select Inputs
Asynchronous Master Reset
OE₁, OE₂
I/O₀−I/O₇
Q₀, Q₇
3−State Output Enable Inputs
Parallel Data Inputs or 3−State Parallel Outputs
Serial Outputs
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 8
Publication Order Number:
MC74AC299/D