MC26LS30_05 Datasheet, PDF (1/14 Pages) ON Semiconductor – Dual Differential (EIA-422-A)/Quad Single-Ended (EIA-423-A) Line Drivers

MC26LS30
Dual Differential
(EIA−422−A)/
Quad Single−Ended
(EIA−423−A) Line Drivers
The MC26LS30 is a low power Schottky set of line drivers which
can be configured as two differential drivers which comply with
EIA−422−A standards, or as four single−ended drivers which comply
with EIA−423−A standards. A mode select pin and appropriate choice
of power supplies determine the mode. Each driver can source and
sink currents in excess of 50 mA.
In the differential mode (EIA−422−A), the drivers can be used up to
10 Mbaud. A disable pin for each driver permits setting the outputs
into a high impedance mode within a +10 V common mode range.
In the single−ended mode (EIA−423−A), each driver has a slew rate
control pin which permits setting the slew rate of the output signal so
as to comply with EIA−423−A and FCC requirements and to reduce
crosstalk. When operated from symmetrical supplies (+5.0 V), the
outputs exhibit zero imbalance
The MC26LS30 is available in a 16−pin surface mount package.
Operating temperature range is −40°C to +85°C.
• Operates as Two Differential EIA−422−A Drivers, or Four
Single−Ended EIA−423−A Drivers
• High Impedance Outputs in Differential Mode
• Short Circuit Current Limit In Both Source and Sink Modes
• ±10 V Common Mode Range on High Impedance Outputs
• ±15 V Range on Inputs
• Low Current PNP Inputs Compatible with TTL, CMOS, and MOS
Outputs
• Individual Output Slew Rate Control in Single−Ended Mode
• Replacement for the AMD AM26LS30 and National Semiconductor
DS3691
• Pb−Free Packages are Available
Representative Block Diagrams
Single−Ended Mode
EIA−423−A
SR−A
Input A
Out A
SR−B
Input B
Out B
Input C
SR−C
Out C
SR−D
Input D
Out D
Differential Mode
EIA−422−A
Enable AB
Input A
Input D
Out A
Out B
Out C
Out D
Enable CD
V_CC−1
V_EE−8
Gnd−5
Mode−4
http://onsemi.com
MARKING
DIAGRAM
16
1
SO−16
D SUFFIX
CASE 751B
16
MC26LS30D
AWLYWW
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
PIN CONNECTIONS
V_CC 1
Input A 2
Input B/
Enable AB
3
Mode 4
Gnd 5
Input C/
Enable CD
6
Input D 7
V_EE 8
16 SR−A
15 Output A
14 ^{Output B}
13 ^SR−B
12 SR−C
11 ^{Output C}
10 ^{Output D}
9 ^SR−D
(Top View)
ORDERING INFORMATION
Device
Package
Shipping^†
MC26LS30D
SO−16
48 Units/Rail
MC26LS30DG
SO−16
(Pb−Free)
48 Units/Rail
MC26LS30DR2
SO−16 2500 Tape & Reel
MC26LS30DR2G SO−16 2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 2
Publication Order Number:
MC26LS30/D